1,028 jobs for ASIC Design Verification Engineer in San Jose, CA | Glassdoor
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ASIC Design Verification Engineer Jobs in San Jose, CA

257 Jobs

  • 4.4
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    $90k-$119k(Glassdoor est.)
    9 days ago 9d
    familiar with all stages of the ASICdesign flow (including specification, architecture, and design implementation) Highly motivated… Verilog), and verification. Expected skills: 5+ years hands-on experience with focus on front-end complex RTL design Programming…
  • 3.7
    Xilinx – San Jose, CA
    $108k-$137k(Glassdoor est.)
    7 days ago 7d
    Wireless FDST Verification group is looking for a Senior DesignVerificationEngineer to contribution on FPGA block… full chip verification. The individual will help design, develop and use simulation and/or formal based verification environments…
  • 3.9
    Cisco Systems – San Jose, CA
    $113k-$153k(Glassdoor est.)
    9 days ago 9d
    Experience in high-performance ASICverification. Good understanding of ASICdesign and verification methodologies and flows.… collaboration with design, software and hardware teams to ensure a successful product delivery. Mentor and enable other engineers. Skills…
  • 4.4
    Google – Mountain View, CA
    $97k-$122k(Glassdoor est.)
    NEW
    interacting with designengineers to identify important verification scenarios. Create a constrained-random verification environment… with designengineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes…
  • 3.9
    Ambarella – Santa Clara, CA
    $70k-$91k(Glassdoor est.)
    7 days ago 7d
    Knowledge of SystemVerilog, Verilog and Perl. Knowledge of designverification, and functional coverage. Ability to program scripting… Electrical Engineering with 0-5 years of experience. Good understanding of computer architecture, logic design and VLSI design. Knowledge…
  • 3.2
    Aquantia – San Jose, CA
    EASY APPLY
    $83k-$104k(Glassdoor est.)
    27 days ago 27d
    understanding of digital designverification methodologies and tools including: • Expertise in creating verification infrastructure using… Responsibilities: • Responsible to define and implement verification architectures for mixed signal data communications semiconductors…
  • 3.9
    Fortinet – Sunnyvale, CA
    $105k-$137k(Glassdoor est.)
    20 days ago 20d
    top-notch ASICengineer to join our front end design team. The team is responsible for designing Fortinet’s next generation ASICs accelerating… stress test design and trouble shoot any issues found in the lab.  Write C/C++ functional test cases for SOC verification.  Analyze…
  • 4.4
    NVIDIA – Santa Clara, CA
    $141k-$189k(Glassdoor est.)
    NEW
    for a Senior ASICVerificationEngineer: NVIDIA is seeking elite ASICVerificationEngineers to verify the design and implementation… responsible for verification of the ASICdesign, architecture, golden models and micro-architecture using advanced verification methodologies…
  • 3.3
    Sony Electronics – San Jose, CA
    $91k-$124k(Glassdoor est.)
    24 days ago 24d
    and design. Sony Electronics, a global leader in image sensors, is seeking a staff VLSI/ASIC logic DesignEngineer to work… develop and implement solutions Familiarity with ASIC/SoC design/verification methodologies Ability to write detailed and clear…
  • 3.8
    Systel – San Jose, CA
    20 days ago 20d
    Role & Responsibilities Will participate in ASICdesignverification for high end switching products. Responsibilities include… Phyton scripts are essential. Must be familiar with ASICdesign and verification methodologies and languages including Verilog, systemVerilog…
  • 3.9
    Fortinet – Sunnyvale, CA
    $86k-$123k(Glassdoor est.)
    Today 2hr
    done. Working with a team of 12 engineers and 16 developers, you will be validating the ASIC drivers and software for current… of experienced software, hardware and ASIC developers. Job Responsibilities Design, develop, and execute test plans and functional…
  • 4.7
    Macropace Technologies – San Jose, CA
    EASY APPLY
    $81k-$113k(Glassdoor est.)
    16 days ago 16d
    experience in ASIC / SoC Verification Expert knowledge in UVM, which is an object-oriented Hardware verification language library… UVM VerificationEngineer San Jose, CA Full Time Position Job Description: 5 to 10 years of directly related…
  • 3.6
    Samsung Semiconductor, Inc. – San Jose, CA
    6 days ago 6d
    feasibility, FPGA prototyping and ASICdesign Supervise verification contractors and oversee the verification flow Supervise back-end… Experience with FPGA prototyping and design flow Experience in large-scale system verification and debug Excellent documentation…
  • 3.7
    Xilinx – San Jose, CA
    $120k-$152k(Glassdoor est.)
    15 days ago 15d
    Wireless FDST Verification group is looking for a Staff DesignVerificationEngineer to contribute on high speed… IC designs and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test ASIC or custom designs. Requires…
  • 3.7
    Intel – San Jose, CA
    $94k-$130k(Glassdoor est.)
    Today 1hr
    working on complex ASIC and FPGA designs in leading edge process nodes.Responsibilities include the following:* Design and integration… Architecture, DesignVerification, Physical Design, DFT, and power teams to achieve first tapeout success on designs* Work with cross-functional…
  • 2.8
    SK Hynix Memory Solutions – San Jose, CA
    $95k-$129k(Glassdoor est.)
    NEW
    with designengineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes… Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers…
  • Novus Resources – San Jose, CA
    EASY APPLY
    $72k-$100k(Glassdoor est.)
    NEW
    experience in ASIC / SoC Verification Expert knowledge in UVM, which is an object-oriented Hardware verification language library… As a designverificationengineer you will work with a fast paced Integrated Wireless Technology (IEEE 802.11x, BT, and FM) team…
  • 4.4
    Google – Mountain View, CA
    $97k-$122k(Glassdoor est.)
    9 days ago 9d
    technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's… cache, DRAM, power management or security. Experience with verification in a standard environment such as UVM. Experience with…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    $94k-$129k(Glassdoor est.)
    NEW
    and deployment of the verification methodology Requirements: 3+ years of SoC/ASICverification experience Hands on… integration in the verification platform Definition of the verification plan in collaboration with the design and architecture…
  • 3.6
    Broadcom Corporation – San Jose, CA
    $120k-$152k(Glassdoor est.)
    5 days ago 5d
    years, equivalent experience in ASICdesign and verification. Experience in verifying designs at system level and block level… System Verilog Assertions. Strong experience in ASICdesignverification flows and DV methodologies. Networking domain knowledge…
  • 3.8
    Marvell Technology – Santa Clara, CA
    $87k-$112k(Glassdoor est.)
    NEW
    system HW engineers. Prefer low power SoC experience. Require good understanding ASIC RTL design and verification experience… Require excellent ASIC bring-up and lab debug experience. Require emulation experience. Prefer ASIC debug experience with…
  • 3.9
    Cisco Systems – San Jose, CA
    $101k-$129k(Glassdoor est.)
    9 days ago 9d
    Experience in high-performance ASICverification. Good understanding of ASICdesign and verification methodologies and flows.… Participate in the architecture and verification of complex, high-performance, and highly integrated ASICs used in Cisco's networking products…
  • 2.8
    cPacket Networks – San Jose, CA
    $83k-$115k(Glassdoor est.)
    9 days ago 9d
    troubleshoot issues in the design. This role may also require creating behavioral models of the design and developing RTL which… candidates to develop and integrate the current and future RTL designs into a UVM environment. Candidates will need to create reports…
  • 3.7
    Intel Corporation – San Jose, CA
    $95k-$130k(Glassdoor est.)
    NEW
    Pre-Si VerificationEngineer Job Description As a DesignVerificationEngineer for high speed digital design you will work… in FPGA, ASIC or custom IC designs. High-speed transceiver protocols including PCI Express or UPI. System Verilog, VMM/UVM. Creating…
  • 3.8
    Marvell Technology – Santa Clara, CA
    $94k-$119k(Glassdoor est.)
    24 days ago 24d
    closure. * MS in EE with 3 years of work experience in SOC/ASIC/IP development. * Must have knowledge and experience of HDL… Knowledge of UVM and System Verilog is required. * Background in ASIC implementation including lint, CDC, synthesis, formal and static…
  • 4.4
    Semi Conductor – San Jose, CA
    9 days ago 9d
    experience in ASIC Logic Functional Verification Preferred skills: Strong background in designverification, Knowledge of… Candidates must have experience performing ASICVerification based on architectural/micro-architectural specification review and…
  • 3.1
    Toshiba America Electronic Components – San Jose, CA
    $106k-$144k(Glassdoor est.)
    NEW
    the SSD Controller ASICverification methodology and environment development Detailed module verification testplan, covering… chip level verification Validate SoC design in FPGA prototyping and emulation platforms Work closely with FW engineers to resolve…
  • 3.5
    Cavium, Inc. – San Jose, CA
    $98k-$136k(Glassdoor est.)
    NEW
    such as UVM. Responsibilities: Contribute as an ASICVerificationEngineer developing the next generation of cloud, networking… directly with senior members of the ASIC team to develop comprehensive, state of the art, verification environment using the latest methodology…
  • 3.6
    Broadcom Corporation – San Jose, CA
    $125k-$170k(Glassdoor est.)
    1 days ago 15hr
    includes definition, architecture, micro architecture, and design and verification tasks, on CSG cutting edge products. The development… Broadcom is the industry leading provider of networking switch ASIC's. CSG team focuses on developing network switch chips that power…
  • 3.9
    Cisco Systems – San Jose, CA
    $106k-$148k(Glassdoor est.)
    9 days ago 9d
    Title: ASIC Physical DesignEngineer Location: San Jose, CA WHO YOU'LL WORK WITH: Our creative and talented team as Physical… Physical Design lead in San Jose, CA. You will work with ASIC Front-end teams to understand chip architecture and drive physical…
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