ASIC Design Verification Engineer Jobs in San Jose, CA | Glassdoor

ASIC Design Verification Engineer Jobs in San Jose, CA

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  • 3.7
    Aquantia – San Jose, CA
    EASY APPLY
    Est. Salary $93k-$117k
    15 days ago 15d
    understanding of digital design verification methodologies and tools including: • Expertise in creating verification infrastructure using… Responsibilities: • Responsible to define and implement verification architectures for mixed signal data communications semiconductors…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $94k-$118k
    18 days ago 18d
    interacting with design engineers to identify important verification scenarios. Create a constrained-random verification environment… with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes…
  • 3.4
    Marvell Technology – Santa Clara, CA
    Est. Salary $110k-$149k
    19 days ago 19d
    Staff ASIC Design or Verification Engineer-Microarchitecture-IP Dev (170017) Staff ASIC Design or Verification Engineer-Microarchitecture-IP… level verification - Create design documentation, programming guide to software engineers or customers - Support verification effort…
  • Connetics USA – San Jose, CA
    Est. Salary $86k-$110k
    25 days ago 25d
    8+ years of directly related industry experience in ASIC/SoC Verification. · Should have worked on developing/implementing test… looking for an exceptional verification engineer to work on complex digital IC projects. The engineer will lead a team-oriented…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $107k-$143k
    4 days ago 4d
    shared infrastructure for FPGA and ASIC design. Synthesize and close timing for FPGA or ASIC implementations. Work closely with… experience. ASIC design experience and experience with 10G, PCIe, DDR4 technology. Experience with high-level design languages,…
  • 3.4
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $90k-$126k
    10 days ago 10d
    experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis, formality verification, DFT. Extensive… integration and verification. CMOS image sensor array/analog related timing control design and verification. Chip bring-up,…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $113k-$175k
    10 days ago 10d
    Qualifications: Responsible for leading a ASIC program and team of ASIC design and verification engineers. Major responsibilities include… architecture and design partition within the ASIC. • Implement blocks using Verilog and work with Verification Engineers to design the verification…
Job Title Location Employer Salary
Sr. ASIC Design Verification Engineer San Jose, CA Aquantia $93k-$117k
ASIC Design Verification Engineer Mountain View, CA Google $94k-$118k
Staff ASIC Design or Verification Engineer-Microarchitecture-IP Dev Santa Clara, CA Marvell Technology $110k-$149k
Lead ASIC Design Verification Engineer San Jose, CA Connetics USA $86k-$110k
FPGA/ASIC Design and Verification Engineer, Waymo Mountain View, CA Google $107k-$143k
Staff ASIC - Digital Design Engineer; Verification Santa Clara, CA Omnivision Technologies, Inc $90k-$126k
Hardware Design Manager Santa Clara, CA Intel $113k-$175k
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