ASIC Verification Engineer Jobs in San Jose, CA | Glassdoor

ASIC Verification Engineer Jobs in San Jose, CA

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  • 4.4
    Embedded Resource Group – San Jose, CA
    EASY APPLY
    Est. Salary $96k-$130k
    15 days ago 15d
    Description ASIC Verification Engineer Sub modules verification and/or full chip level verification of SSD controllers… Requirements Required Skills: • 7+ years of SoC/ASIC verification experience • UVM or OVM experience • System Verilog…
  • 4.5
    Macropace Technologies – San Jose, CA
    EASY APPLY
    Est. Salary $80k-$108k
    4 days ago 4d
    ASIC Verification Engineer San Jose, CA Full Time Position Job Description: 5 to 10 years of directly related… experience in ASIC / SoC Verification Expert knowledge in UVM, which is an object-oriented Hardware verification language library…
  • 3.1
    Toshiba America Business Solutions – San Jose, CA
    Est. Salary $66k-$89k
    14 days ago 14d
    will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
  • 3.8
    Infinera – Sunnyvale, CA
    Est. Salary $69k-$93k
    16 days ago 16d
    to verification and bring-up of networking ASICs/FPGAs being developed. Develop tools to automate design and verification methodology… to automate verification of ASIC's in the lab. Minimum Knowledge/Skills/Abilities: Contribute to verification and bring-up…
  • 3.5
    Microchip Technology – San Jose, CA
    Est. Salary $65k-$90k
    2 days ago 2d
    and Networking design at Microchip. As part of our seasoned ASIC design team, you will work on USB and networking communication… Job Requirements BS/MS in Electrical or Computer Engineering, with coursework in the following areas: Microelectronic…
  • 4.4
    Embedded Resource Group – San Jose, CA
    EASY APPLY
    Est. Salary $96k-$130k
    23 days ago 23d
    Job Description ASIC Verification Engineer - UVM, System Verilog Develop UVM test environment. Must have… Required Skills: • 10+ years of SoC / Chip level verification • Proficient in the UVM methodology and System Verilog…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $94k-$118k
    17 days ago 17d
    interacting with design engineers to identify important verification scenarios. Create a constrained-random verification environment using… with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and…
  • 3.7
    Aquantia – San Jose, CA
    EASY APPLY
    Est. Salary $93k-$117k
    14 days ago 14d
    understanding of digital design verification methodologies and tools including: • Expertise in creating verification infrastructure using… Responsibilities: • Responsible to define and implement verification architectures for mixed signal data communications semiconductors…
  • 3.4
    Marvell Technology – Santa Clara, CA
    Est. Salary $110k-$149k
    18 days ago 18d
    Staff ASIC Design or Verification Engineer-Microarchitecture-IP Dev (170017) Staff ASIC Design or Verification Engineer-Microarchitecture-IP… level verification - Create design documentation, programming guide to software engineers or customers - Support verification effort…
  • 3.3
    Cavium, Inc. – San Jose, CA
    Est. Salary $96k-$131k
    24 days ago 24d
    Contribute as an ASIC Verification Engineer developing the next generation of SOC Processors. Work with a Design Engineer to develop… random techniques, and perform coverage analysis to achieve verification goals. Requirements: Bachelors or Masters Degree in EE…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $107k-$143k
    3 days ago 3d
    shared infrastructure for FPGA and ASIC design. Synthesize and close timing for FPGA or ASIC implementations. Work closely with… qualifications: Image processing/DSP knowledge and experience. ASIC design experience and experience with 10G, PCIe, DDR4 technology…
  • Connetics USA – San Jose, CA
    Est. Salary $86k-$110k
    24 days ago 24d
    8+ years of directly related industry experience in ASIC/SoC Verification. · Should have worked on developing/implementing test… looking for an exceptional verification engineer to work on complex digital IC projects. The engineer will lead a team-oriented…
  • 3.7
    Palo Alto Networks – Santa Clara, CA
    Est. Salary $150k-$200k
    Today 5hr
    team-oriented senior networking FPGA and ASIC verification engineer to participate in the verification effort. This individual will be… and ASIC system, full chip, and block level verification team. Responsibilities will include developing the verification environment…
  • 3.4
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $90k-$126k
    9 days ago 9d
    experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis, formality verification, DFT. Extensive… integration and verification. CMOS image sensor array/analog related timing control design and verification. Chip bring-up,…
  • 3.3
    Cavium, Inc. – San Jose, CA
    Est. Salary $96k-$131k
    23 days ago 23d
    Responsibilities: Contribute as an ASIC Verification Engineer, developing the next generation of SOC Processors. Work closely… analysis. Develop scripts and verification infrastructure tools. Involvement in verification methodology discussions and decisions…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $113k-$175k
    10 days ago 10d
    Qualifications: Responsible for leading a ASIC program and team of ASIC design and verification engineers. Major responsibilities include… within the ASIC. • Implement blocks using Verilog and work with Verification Engineers to design the verification environment.…
  • 3.6
    Mobiveil – Milpitas, CA
    EASY APPLY
    17 days ago 17d
    Experience in ASIC/IP functional Verification Engineer Strong expertise in 100G Ethernet PCS Protocol Verification Experience…
  • 3.6
    Mobiveil – Milpitas, CA
    EASY APPLY
    Est. Salary $73k-$99k
    11 days ago 11d
    Requirements: 5-10 years of experience in ASIC/IP functional Verification Engineer Strong expertise in all layers of any of… in the areas of PCIE, DDR, HBM, NOC, DSP etc. Strong verification failure debugging skills using Verdi or other debuggers.…
Job Title Location Employer Salary
ASIC Verification Engineer San Jose, CA Embedded Resource Group $96k-$130k
ASIC Verification Engineer San Jose, CA Macropace Technologies $80k-$108k
1047 - Senior Principal ASIC Verification Engineer San Jose, CA Toshiba America Business Solutions $66k-$89k
Intern - ASIC Verification Engineer Sunnyvale, CA Infinera $69k-$93k
ASIC Verification Engineer - New College Grad San Jose, CA Microchip Technology $65k-$90k
ASIC Verification Engineer - UVM, System Verilog San Jose, CA Embedded Resource Group $96k-$130k
ASIC Design Verification Engineer Mountain View, CA Google $94k-$118k
Sr. ASIC Design Verification Engineer San Jose, CA Aquantia $93k-$117k
Staff ASIC Design or Verification Engineer-Microarchitecture-IP Dev Santa Clara, CA Marvell Technology $110k-$149k
New College Graduates 2017- ASIC Verification Engineer - VECH01 San Jose, CA Cavium, Inc. $96k-$131k
FPGA/ASIC Design and Verification Engineer, Waymo Mountain View, CA Google $107k-$143k
Lead ASIC Design Verification Engineer San Jose, CA Connetics USA $86k-$110k
Sr Staff Hardware Engineer (Design Verification) Santa Clara, CA Palo Alto Networks $150k-$200k
Staff ASIC - Digital Design Engineer; Verification Santa Clara, CA Omnivision Technologies, Inc $90k-$126k
New College Graduates 2017 - Verification Engineer - DECH19 San Jose, CA Cavium, Inc. $96k-$131k
Hardware Design Manager Santa Clara, CA Intel $113k-$175k
100G Ethernet PCS Protocol Verification Milpitas, CA Mobiveil $72k-$92k
PCIe Gen3/4 Verification Engineers Milpitas, CA Mobiveil $73k-$99k
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