Senior ASIC Design Verification Engineer Jobs in San Jose, CA | Glassdoor

Senior ASIC Design Verification Engineer Jobs in San Jose, CA

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  • 3.3
    Aquantia – San Jose, CA
    Est. Salary $81k-$102k
    20 days ago 20d
    understanding of digital design verification methodologies and tools including: • Expertise in creating verification infrastructure using… Responsibilities: • Responsible to define and implement verification architectures for mixed signal data communications semiconductors…
  • 2.9
    Fortive – Santa Clara, CA
    Est. Salary $97k-$127k
    Today 8hr
    Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • 3.5
    Broadcom – Santa Clara, CA
    Est. Salary $119k-$156k
    1 days ago 23hr
    years with MSEE/MSCE in ASIC Physical Design from RTL to GDSII Strong experience in Physical Design – place and route; Floorplanning… analysis Strong skills in Physical Verification (DRC/LVS/ERC/ANT) with digital and mixed-signal designs Strong Timing closure skills…
  • Cadence – San Jose, CA
    Est. Salary $114k-$155k
    6 days ago 6d
    space and have delivered great QoR on an FPGA/ASIC synthesis or FPGA/ASIC verification tool chain or you are an algorithm ninja and… technology. The Software Architect will be a senior member of the Hardware Verification Research and Development team working in the…
  • Approgence – San Jose, CA
    Est. Salary $82k-$110k
    6 days ago 6d
    analysis and post silicon verification support. - Modem ASIC Design team is working with system engineer to understand wireless standards… perform bit-exact simulation. - Modem ASIC Design team is working with physical design engineer to deliver netlist, spec timing constraints…
  • Approgence – San Jose, CA
    Est. Salary $82k-$110k
    6 days ago 6d
    analysis and post silicon verification support. - Modem ASIC Design team is working with system engineer to understand wireless standards… Job Title : Senior ASIC/ RTL Design Engineer with DSP Job Location : San Diego & San Jose, CA Job Description : This…
  • 4.1
    Cadence Design Systems – San Jose, CA
    Est. Salary $105k-$135k
    13 days ago 13d
    logic Aware of ASIC design flow. Experience with some frontend design tools such as Incisive/NCSim, Genus/Design Compiler, STA… technology team responsible for research and development of these ASIC engines and how they work as a system to reprogrammably emulate customers…
  • Cadence – San Jose, CA
    Est. Salary $82k-$108k
    8 days ago 8d
    * Aware of ASIC design flow. Experience with some frontend design tools such as Incisive/NCSim, Genus/Design Compiler, STA… technology team responsible for research and development of these ASIC engines and how they work as a system to reprogrammably emulate customers…
  • 3.8
    Infineon Technologies – San Jose, CA
    7 days ago 7d
    relevant experience in the area of VLSI/ASIC design, verification, validation, board design and customer support Experience in silicon… decisions and results with quality Work with Concept Engineers, designers, verification and validation teams across sites to collect requirement…
  • 3.6
    Intel – San Jose, CA
    Est. Salary $69k-$95k
    10 days ago 10d
    works on all levels of ASIC development, spanning high-level architecture to RTL design and verification and volume manufacturing… join our Data Center Group (DCG) team as a Senior Pre-Silicon Design Verification Lead! You are joining an innovative team in…
  • 4.1
    Cadence Design Systems – San Jose, CA
    Est. Salary $168k-$229k
    11 days ago 11d
    space and have delivered great QoR on an FPGA/ASIC synthesis or FPGA/ASIC verification tool chain or you are an algorithm ninja and… technology. The Software Architect will be a senior member of the Hardware Verification Research and Development team working in the…
  • 3.6
    Intel – San Jose, CA
    Est. Salary $115k-$155k
    10 days ago 10d
    join our Data Center Group (DCG) team as a Senior Pre-Silicon Design Verification Engineer! You are joining an innovative team in… team to contribute to our success. As a Senior Pre-Silicon Design Verification Engineer, you will develop pre-Silicon functional…
  • 3.8
    Infineon Technologies – San Jose, CA
    7 days ago 7d
    industry with relevant experience in the area of VLSI/ASIC design, verification, validation, customer support, project and people… achieving business objectives Work with IP designers, Concept Engineers, verification and validation teams across sites to collect…
  • 3.7
    Cavium – San Jose, CA
    Est. Salary $114k-$156k
    18 days ago 18d
    Ensures work done in a non-ASIC product environment, matches work produced by Electronic Design Engineer personnel on project;… Integrated Circuit (ASIC) development. Specific duties will include: * Determines architecture design, logic design, and system…
  • 3.3
    Cavium, Inc. – San Jose, CA
    Est. Salary $114k-$157k
    20 days ago 20d
    Ensures work done in a non-ASIC product environment, matches work produced by Electronic Design Engineer personnel on project; Works… Integrated Circuit (ASIC) development. Specific duties will include: Determines architecture design, logic design, and system simulation…
  • 3.6
    Intel – San Jose, CA
    10 days ago 10d
    works on all levels of ASIC development, spanning high-level architecture to RTL design and verification and volume manufacturing… contribute to our success. As a DFX Senior Designer you will be a senior uArch/designer for Test/Debug/Manufacturability/Reliability…
  • 3.7
    Xilinx – San Jose, CA
    Est. Salary $86k-$118k
    28 days ago 28d
    equipment. Determine architecture design, logic design, and system simulation. Perform ASIC verification by building the next generation… Oversee definition, design, verification, and documentation for application specific integrated circuitry (ASIC) for Xilinx electronic…
  • 3.8
    Infineon Technologies – San Jose, CA
    7 days ago 7d
    relevant experience in the area of VLSI/ASIC design, verification, validation, board design and customer support Experience in silicon… decisions and results with quality Work with Concept Engineers, designers, verification and validation teams across sites to collect requirement…
  • 2.9
    Avago Technologies – San Jose, CA
    Est. Salary $95k-$129k
    16 days ago 16d
    integrating into the overall project designing block level tests and assisting in chip level verification performing synthesis and static… implementations This requisition is approved for the Senior Staff Engineer level. At this level, candidates should have BSEE w/…
  • 3.5
    Broadcom – San Jose, CA
    Est. Salary $90k-$123k
    14 days ago 14d
    integrating into the overall project designing block level tests and assisting in chip level verification performing synthesis and static… implementations This requisition is approved for the Senior Staff Engineer level. At this level, candidates should have BSEE w/…
  • 3.6
    Intel Corporation – San Jose, CA
    Est. Salary $69k-$95k
    10 days ago 10d
    works on all levels of ASIC development, spanning high-level architecture to RTL design and verification and volume manufacturing… join our Data Center Group (DCG) team as a Senior Pre-Silicon Design Verification Lead! You are joining an innovative team in…
  • 3.7
    Xilinx – San Jose, CA
    Est. Salary $105k-$132k
    28 days ago 28d
    Has excellent working knowledge of the entire FPGA or ASIC design process and tool flow, with in-depth expertise in timing… interfaces effectively with industry forums to identify design engineering practices of potential benefit to Xilinx Software Validation…
  • Avalanche – Fremont, CA
    Est. Salary $101k-$150k
    Today 11hr
    current verification capabilities and flows Requirements 4+ years of experience in ASIC/Memory design verification Experience… Job Description & Responsibilities As a Senior verification design engineer at Avalanche Technology Inc., you will work with…
  • 3.4
    Advanced Micro Devices, Inc. – Sunnyvale, CA
    Est. Salary $91k-$116k
    26 days ago 26d
    programming verification techniques following UVM methodology. Required Skills Strong background in ASIC Design flow and Design… for the Design and Verification of several critical as well as the integration to other subsystems and SoC. The Design and Design…
  • 3.6
    Intel – Santa Clara, CA
    6 days ago 6d
    group. We are looking for a senior expert in SoC architecture and design for advanced modem Baseband ASIC. Drive architecture definition… modem ASIC or wireless AP SoC implementation is a must. This position requires a MSEE/PhD in Electrical Engineering and 10+…
  • 3.9
    Inphi Corporation – Santa Clara, CA
    4 days ago 4d
    seeking to hire Senior Staff Design engineer for primary contribution to innovative, industry leading PHY ASIC development activities… to identify design improvements The successful candidate will be experienced with the IC/ASIC design/verification flow through…
  • 3.3
    Micron – Milpitas, CA
    Est. Salary $105k-$139k
    4 days ago 4d
    to the design and verification, the individual will be involved in synthesis, timing closure, FPGA validation and ASIC bring-up… Req Id: 80441  As a Senior Design Engineer to work on the SSD controllers at Micron Technology, Inc., the individual will be…
  • 3.0
    Tektronix – Santa Clara, CA
    Est. Salary $112k-$145k
    3 days ago 3d
    Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • 3.0
    Fluke Corporation – Santa Clara, CA
    Est. Salary $96k-$125k
    3 days ago 3d
    Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • Approgence – Santa Clara, CA
    13 days ago 13d
    looking for a senior expert in SoC Physical Design and RTL Delivery Management for advanced modem Baseband ASIC. - Provide technical… decision-making skills and the ability to influence across the Baseband ASIC core team as well as other functional teams. - The successful…
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