Senior Verification Engineer Jobs in San Jose, CA

• 4.4
  Senior Verification Engineer

  NVIDIA – Santa Clara, CA

  Est. Salary $140k-$188k

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  For Senior Verification Engineer at NVIDIA in Santa Clara, CA

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  18 days ago 18d

  Responsible for verification of design, architecture, golden models and micro-architecture using advanced verification methodologies… the design and implementation, define the verification scope, develop the verification infrastructure (Transactors, Testbenches,…
• 3.9
  Senior Design Verification Engineer

  Cisco Systems – San Jose, CA

  Est. Salary $100k-$127k

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  For Senior Design Verification Engineer at Cisco Systems in San Jose, CA

  The median pay of $112k is:

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  5 days ago 5d

  in the lab. * Mentor and enable other engineers. * Lead and oversee design verification efforts of a cluster of blocks. Skills… Experience in high-performance ASIC verification. * Good understanding of ASIC design and verification methodologies and flows. * Hands-on…
• 4.4
  Senior Design Validation Engineer

  VeriSilicon Holdings Co., Ltd. – San Jose, CA

  EASY APPLY

  Est. Salary $69k-$97k

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  For Senior Design Validation Engineer at VeriSilicon in San Jose, CA

  The median pay of $83k is:

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  5 days ago 5d

  degree in Electrical Engineering or equivalent practical experience. Strong background in SOC verification methodology and test… the verification of large scale designs such as GPUs, CPUs or networking product. Experienced with the full verification cycle…
• 4.0
  Senior Staff Engineer, Verification

  Inphi Corporation – Santa Clara, CA

  18 days ago 18d

  We are looking for a Senior Staff VerificationEngineer. The candidate must have proven record of verifying complex designs leading… and design engineers. Responsibilities include: Technical leadership, own chip and block level verification. Define chip…
• 3.7
  Senior Design Verification Engineer

  Intel – San Jose, CA

  Est. Salary $93k-$117k

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  For Senior Design Verification Engineer at Intel Corporation in San Jose, CA

  The median pay of $105k is:

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  NEW

  Job Description As a Senior Design VerificationEngineer for high speed digital design you will work closely with an energetic… will create verification architecture and test-plan specifications. You will be responsible for design verification of a complex…
• 3.9
  Senior ASIC Verification Engineer

  Cisco Systems – San Jose, CA

  Est. Salary $112k-$152k

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  For Senior ASIC Verification Engineer at Cisco Systems in San Jose, CA

  The median pay of $131k is:

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  5 days ago 5d

  enable other engineers. Skills Required: Experience in high-performance ASIC verification. Good understanding… micro-architecture specification and reviews. Engage in verification environment architecture and methodology development. Drive…
• 2.7
  Senior Design Verification Engineer

  SK Hynix Memory Solutions – San Jose, CA

  Est. Salary $90k-$114k

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  For Senior Design Verification Engineer at SK Hynix Memory Solutions in San Jose, CA

  The median pay of $101k is:

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  The range of $90k - $114k is:

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  25 days ago 25d

  As a SoC VerificationEngineer, the successful candidate will be responsible for functional verification of high performance SSD… years of work experience in SoC verification. Strong hands on experience in the latest verification methodologies System Verilog…
• 3.9
  Senior ASIC/SoC Verification Engineer

  Axelon, Inc. – San Jose, CA

  Est. Salary $98k-$134k

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  For Senior ASIC/SoC Verification Engineer at Axelon in San Jose, CA

  The median pay of $114k is:

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  4 days ago 4d

  We are currently looking for a Senior ASIC/SoC VerificationEngineer (Contract Position) to join our team in San Jose, CA. He… M.S. in Computer Engineering or Electrical Engineering • Prior Verification experience required • UVM verification experience highly…
• 4.4
  Senior ASIC Design Engineer

  VeriSilicon Holdings Co., Ltd. – San Jose, CA

  EASY APPLY

  Est. Salary $89k-$119k

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  For Senior ASIC Design Engineer at VeriSilicon in San Jose, CA

  The median pay of $102k is:

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  The range of $89k - $119k is:

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  5 days ago 5d

  micro-architecture, implementation (using Verilog), and verification. Expected skills: 5+ years hands-on experience with…
• 3.0
  Senior UVM Verification Engineer

  Innovative Logic Inc. – San Jose, CA

  Est. Salary $93k-$126k

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  For Senior UVM Verification Engineer at Innovative Logic in San Jose, CA

  The median pay of $109k is:

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  The range of $93k - $126k is:

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  NEW

  We are looking for VerificationEngineer who has recent experience working on systemverilog using UVM methodology. · 5+ years… years of verification experience at block level or top level · Experience writing testbenches in UVM using PCIE, Ethernet, AMBA…
• 3.6
  Senior Verification Test Engineer

  Xilinx – San Jose, CA

  Est. Salary $88k-$112k

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  For Senior Verification Test Engineer at Xilinx in San Jose, CA

  The median pay of $99k is:

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  The range of $88k - $112k is:

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  19 days ago 19d

  coverage Work closely with IC Design, Software Engineering, Product Verification Team, Product and Test teams at all geographical… design tools and methodologies is a plus Proficient use of verification EDA tools such as Cadence/Synopsys (simulation, fault grading…
• no.logo.alt
  Senior Mechanical Engineer

  InCube Labs – San Jose, CA

  EASY APPLY

  NEW

  prototypes. As a Senior/Principal Mechanical Engineer, your role is to utilize creativity and sound engineering judgment in the… and plan steps for mitigating risks Perform component verification testing and product validation testing Collaborate with…
• 4.4
  Senior ASIC Verification Engineer

  NVIDIA – Santa Clara, CA

  Est. Salary $140k-$188k

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  For Senior ASIC Verification Engineer at NVIDIA in Santa Clara, CA

  The median pay of $161k is:

  Too LowAbout RightToo High

  The range of $140k - $188k is:

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  6 days ago 6d

  now looking for a Senior ASIC VerificationEngineer: NVIDIA is seeking an elite ASIC VerificationEngineer to verify the design… future of computing. What you’ll be doing: As a VerificationEngineer at NVIDIA, you will verify the design and implementation…
• 3.7
  Senior Electrical Engineer

  OpTerra Energy Group – San Jose, CA

  Est. Salary $103k-$141k

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  For Senior Electrical Engineer at OpTerra Energy Group in San Jose, CA

  The median pay of $120k is:

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  The range of $103k - $141k is:

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  NEW

  operations and sales teams. RESPONSIBILITIES The Senior Electrical Engineer is responsible for the following: Provide technical… of design engineers, project managers and engineering consultants to design, review and approve electrical engineering scope of…
• 3.4
  Senior Design Verification Engineer

  Synapse Design – Santa Clara, CA

  EASY APPLY

  Est. Salary $92k-$116k

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  For Senior Design Verification Engineer at Synapse Design in Santa Clara, CA

  The median pay of $103k is:

  Too LowAbout RightToo High

  The range of $92k - $116k is:

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  NEW

  UVM · Utilize advanced verification techniques · Write tools and scripts to enhance the verification process Qualifications… UVM · Some level of processor based verification · Experience with advanced verification techniques like constrained random generation…
• 3.2
  Senior ASIC Verification Engineer

  Rambus – Sunnyvale, CA

  Est. Salary $102k-$139k

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  For Senior ASIC Verification Engineer at Rambus in Sunnyvale, CA

  The median pay of $120k is:

  Too LowAbout RightToo High

  The range of $102k - $139k is:

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  4 days ago 4d

  Rambus Security Division (RSD) is hiring a talented Senior ASIC VerificationEngineer to join our world class technology team in our… including ASIC design engineers and architects, other verificationengineers and system test engineers, security experts, and…
• 3.1
  Senior Principal ASIC Verification Engineer

  Toshiba – San Jose, CA

  Est. Salary $69k-$95k

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  For Senior Principal ASIC Verification Engineer at Toshiba in San Jose, CA

  The median pay of $81k is:

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  30+ days ago 30d+

  will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
• 4.2
  Design Verification Senior Engineer

  Integrated Resources – Santa Clara, CA

  Est. Salary $100k-$127k

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  For Design Verification Senior Engineer at Integrated Resources in Santa Clara, CA

  The median pay of $111k is:

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  The range of $100k - $127k is:

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  NEW

  the Pre-Silicon design verification team in verifying the core-level memory-subsystem blocks. The engineer will be responsible…
• 3.4
  Senior Design Verification Engineer

  Micron – Milpitas, CA

  Est. Salary $99k-$130k

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  For Senior Design Verification Engineer at Micron Technology in Milpitas, CA

  The median pay of $114k is:

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  The range of $99k - $130k is:

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  16 days ago 16d

  As a Senior Design VerificationEngineer at Micron Technology, Inc., you will be responsible for logic design verification of Micron… memory. Support of design verification methodology enhancements. Technical support to verification team members in Micron’s China…
• 3.6
  CPU Design Verification Engineer - Senior to Principal (Bay

  Qualcomm – Santa Clara, CA

  Est. Salary $113k-$145k

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  For CPU Design Verification Engineer - Senior to Principal (Bay at Qualcomm in Santa Clara, CA

  The median pay of $130k is:

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  The range of $113k - $145k is:

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  5 days ago 5d

  Job Id E1955055 Job Title CPU Design VerificationEngineer - Senior to Principal (Bay Area) Post Date 04/28/2017… openings for a CPU Design VerificationEngineer in the Bay Area. These positions range from Senior to Principal level. Responsibilities…
• 2.9
  Senior Principal ASIC Verification Engineer

  Toshiba America Electronic Components – San Jose, CA

  EASY APPLY

  Est. Salary $93k-$127k

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  For Senior Principal ASIC Verification Engineer at Toshiba America Electronic Components in San Jose, CA

  The median pay of $109k is:

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  The range of $93k - $127k is:

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  24 days ago 24d

  will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
• 3.0
  Senior ASIC Verification Engineer UVM

  Innovative Logic Inc. – San Jose, CA

  Est. Salary $93k-$126k

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  For Senior ASIC Verification Engineer UVM at Innovative Logic in San Jose, CA

  The median pay of $109k is:

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  The range of $93k - $126k is:

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  22 days ago 22d

  We are looking for UVM Verificationengineer with the followings skills. You have to spend most of the time writing test benches… SystemVerilog, UVM, C, Verilog · Good understanding of new verification concepts…
• 3.4
  Senior Staff Verification Engineer

  Micron Technology, Inc. – Milpitas, CA

  Est. Salary $145k-$199k

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  For Senior Staff Verification Engineer at Micron Technology in Milpitas, CA

  The median pay of $167k is:

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  The range of $145k - $199k is:

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  19 days ago 19d

  Req. ID: 87278 As a Senior Staff VerificationEngineer in the System Modeling Group at Micron Semiconductor Products, Inc… successful applicant will be a quick learner, skilled verificationengineer, have great communciation skills, and be self-motivated…
• 3.1
  Senior Verification & Validation Engineer

  STERIS – Santa Clara, CA

  Est. Salary $70k-$98k

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  For Senior Verification & Validation Engineer at STERIS in Santa Clara, CA

  The median pay of $83k is:

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  15 days ago 15d

  relevant experience in product design engineering environment. 3-5 years of verification and validation experience. Expertise… protocols for product verification & validation testing. Develop software and hardware test tools for verification & validation.…
• 3.1
  Formal Verification Engineer

  Samsung Austin R&D Center – San Jose, CA

  Est. Salary $102k-$138k

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  For Formal Verification Engineer at Samsung Austin Semiconductor in San Jose, CA

  The median pay of $118k is:

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  9 days ago 9d

  JOB TITLE Senior Formal VerificationEngineer Requisition ID DSA31118 OVERVIEW Samsung Semiconductor, Inc… features for formal verification develop formal verification plans Work with RTL to create formal verification friendly reference…
• 5.0
  Senior ESD Verification Engineer

  Silego Technology – Santa Clara, CA

  EASY APPLY

  Est. Salary $80k-$110k

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  For Senior ESD Verification Engineer at Silego Technology in Santa Clara, CA

  The median pay of $94k is:

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  19 days ago 19d

  motivated ESD VerificationEngineer with ESD background through simulations and proactive lab characterization. In this senior level role…
• 2.7
  Senior Verification & Validation Engineer

  Integrated Medical Systems – Santa Clara, CA

  Est. Salary $70k-$99k

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  For Senior Verification & Validation Engineer at Integrated Medical Systems International in Santa Clara, CA

  The median pay of $84k is:

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  17 days ago 17d

  relevant experience in product design engineering environment. 3-5 years of verification and validation experience. Expertise… protocols for product verification & validation testing. Develop software and hardware test tools for verification & validation.…
• 2.7
  Senior Staff Mixed Signal Verification Engineer

  Microsemi – San Jose, CA

  Est. Salary $103k-$138k

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  For Senior Staff Mixed Signal Verification Engineer at Microsemi in San Jose, CA

  The median pay of $119k is:

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  11 days ago 11d

  -10% Job Category: Engineering Job Description: The Verification team is responsible for verification of the custom FPGA centric… , and firmware) verifications strategies Manage schedules and deliverables for projects Write verification specifications,…
• 3.1
  Principal Verification Engineer

  Integrated Device Technology – San Jose, CA

  Est. Salary $116k-$155k

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  For Principal Verification Engineer at Integrated Device Technology in San Jose, CA

  The median pay of $135k is:

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  The range of $116k - $155k is:

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  6 days ago 6d

  the place to be. Description Senior, Staff or Principal VerificationEngineer Job Description Location: San Jose… Jose, CA (CPD) IDT is looking for a verificationengineer for analog mixed signal SoC in consumer products division, who fits…
• 3.7
  ASIC & FPGA Verification Engineer Senior

  Lockheed Martin – Sunnyvale, CA

  Est. Salary $112k-$153k

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  For ASIC & FPGA Verification Engineer Senior at Lockheed Martin in Sunnyvale, CA

  The median pay of $132k is:

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  5 days ago 5d

  support and technical direction to entry engineers. Contribute to design, simulation, verification, integration & test of complex, high… ASIC & FPGA development on R&D program. Seniorengineer with experience in developing, testing, and integrating digital signal…