ASIC Design Engineer Jobs in Santa Clara, CA | Glassdoor
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ASIC Design Engineer Jobs in Santa Clara, CA

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  • 4.4
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    Est. Salary $89k-$120k
    NEW
    -end complex RTL design Programming skills in Verilog Must be familiar with all stages of the ASICdesign flow (including specification… of computer graphics and low-power design techniques a plus Experience of GPU shader design a plus…
  • 3.7
    Infinera – Sunnyvale, CA
    Est. Salary $137k-$176k
    4 days ago 4d
    impact on internal designs and architecture. Micro-architecture and design of ASIC/FPGA: Includes design documentation, review… 6+ years of experience in ASICDesign. Participation in at least 1 full ASIC cycle as a designer from Arch to Bringup Good…
  • 4.0
    Apple – Santa Clara, CA
    Est. Salary $110k-$154k
    10 days ago 10d
    Architecture, Design verification, Physical Design, DFT, and power teams to achieve first tapeout success on designs 3) Develop… aspects of development design for large SOC blocks including: Internal and external IP integration, design of system bus and control…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $104k-$144k
    NEW
    Title: ASIC Physical DesignEngineer Location: San Jose, CA WHO YOU'LL WORK WITH: Our creative and talented team as Physical… Physical Design lead in San Jose, CA. You will work with ASIC Front-end teams to understand chip architecture and drive physical…
  • 3.7
    Fortinet – Sunnyvale, CA
    Est. Salary $87k-$115k
    14 days ago 14d
    Description Fortinet ASICdesign team is looking for a top computer engineering or electrical engineering graduate with an interest… member of the ASICdesign team, you will help design Fortinet’s next generation Network Processor and System-On-Chip ASIC to accelerate…
  • 4.4
    NVIDIA – Santa Clara, CA
    Est. Salary $99k-$130k
    7 days ago 7d
    collaborating with other architects, ASICdesigners and verification engineers to design high frequency clocks. You should be… today. The GPU clocks group is looking for a top-notch ASICengineer to join the team. The Team is responsible for crafting all…
  • 3.9
    Ambarella – Santa Clara, CA
    Est. Salary $89k-$116k
    7 days ago 7d
    Electrical Engineering with 0-5 years of experience. Good understanding of computer architecture, logic design and VLSI design. Knowledge… programing and scripting languages. Design integration, logic synthesize, and design optimization for timing, area and power…
  • 3.7
    Intel – San Jose, CA
    Est. Salary $91k-$118k
    17 days ago 17d
    Job Description Component DesignEngineers are responsible for the design and development of electronic components. Responsibilities… Responsibilities may include: the design of chip layout circuit design, circuit checking, device evaluation and characterization, documentation…
  • 3.6
    MoTek Technologies – San Jose, CA
    25 days ago 25d
    The ASICDesignEngineer will design and verify of next generation SoC Voice/Audio products. The ASICDesignEngineer responsibilities… Design Engineer also needs to get involved with backend flow to achieve timing closure. â¢The ASICDesignEngineer must be a team player…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $87k-$110k
    8 days ago 8d
    control, supporting P&R, design rule checks RTL design and give design review. Work with testing engineer to evaluate, validate and… Responsible for design, development, modification and evaluation of high-speed digital circuit for signal processing components…
  • 3.3
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $106k-$145k
    NEW
    encoder hardware. Design low-power architectures for H.265 video encoder hardware. Work with RTL designengineers to implement H.265… Electrical Engineering or a related field. Require two years of experience in the job offered or in Digital DesignEngineering.…
  • 4.3
    Quanergy – Sunnyvale, CA
    Est. Salary $83k-$108k
    16 days ago 16d
    The Digital ASICDesignEngineer at Quanergy will be responsible for collaboratively developing control and digital signal processing… characterize/test the performance of the designedASIC, and work to integrate the design into our LiDAR sensors. A successful…
  • 4.5
    Technology Search International – Santa Clara, CA
    Est. Salary $92k-$118k
    18 days ago 18d
    Opportunity for an experienced ASIC Verification Engineer who has experience with SoCs and ASICs and verifying data center & communication… some really fantastic highly programmable ASICs. Requirements: 8+ years of ASIC / SoC Verification experience with SV/UVM…
  • 3.3
    Calsoft Labs Inc. – Santa Clara, CA
    Est. Salary $97k-$124k
    18 days ago 18d
    Experience: See below Education: See below ASICDesign Verification Engineers, Santa Clara, CA. Exp in System Verilog, OVM, UVM,… ASICDesign Verification EngineersCompany: Calsoft Labs Inc. Location: Santa Clara, CA Position Type: Full Time Experience…
  • 3.7
    Intel – San Jose, CA
    Est. Salary $93k-$138k
    7 days ago 7d
    Job Description As a member of the ASIC Frontend Design and Integration team, you will be part of Intel's Programmable Solution… Solution Group PSG, working on complex ASIC and FPGA designs in leading edge process nodes. Responsibilities include the following:…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $85k-$114k
    17 days ago 17d
    stages of ASICdesign flows, and is experienced with state-of-the-art design tools. The candidate is strong in logic design and verification… Provide design documentation, description and information to application engineers, field application engineers, test engineers, production…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $98k-$123k
    23 days ago 23d
    complex digital design blocks by fully understanding the design specification and interacting with designengineers to identify important… and corner-cases. Debug tests with designengineers to deliver functionally correct design blocks. Close coverage measures to…
  • 3.7
    Infinera – Sunnyvale, CA
    Est. Salary $156k-$200k
    7 days ago 7d
    impact on internal designs and architecture. Micro-architecture and design of ASIC/FPGA: Includes design documentation, review… 10+ years of experience in ASICDesign. Participation in at least 1 full ASIC cycle as a designer from Arch to Bringup Good…
  • 3.1
    Huawei – Santa Clara, CA
    16 days ago 16d
    electrical engineering or equivalent. At least 10 years of industrial experience in ASICdesign Solid ASICdesign experience… Overview We are seeking an ASICDesignEngineer to be an important team member in the research, design and verification of SoCs…
  • 4.0
    Cadence Design Systems – San Jose, CA
    Est. Salary $143k-$183k
    17 days ago 17d
    application engineers on solving customer reported issues. Help with bringup, integration, and validation of ASIC and ASIC/FPGA-based… Key responsibilities Develop FPGA designs and subsystems (in some cases involving ASICs), from concept to productization including…
  • 4.0
    Apple – Santa Clara, CA
    Est. Salary $129k-$193k
    NEW
    leading high performance low power cache designs Manage a talented high powered ASICdesign team through career growth Lead the… Senior ASICDesign Manager - Cache Subsystem Job Number: 112919812 Santa Clara Valley, California, United States Posted…
  • 3.7
    Xilinx – San Jose, CA
    Est. Salary $108k-$136k
    NEW
    management is a plus. Strong understanding of different phases of ASIC and/or full custom chip development is required. Experience… FDST Verification group is looking for a Senior Design Verification Engineer to contribution on FPGA block, sub-system and full…
  • 4.0
    Roche – Santa Clara, CA
    Est. Salary $101k-$140k
    NEW
    years of experience as an ASICDesignEngineer . EDUCATION: Minimum BS in Electrical Engineering.… Architecture; knowledge and hands-on experience from industry ASICdesign flow including RTL coding, debugging/verification, and supporting…
  • Approgence – San Jose, CA
    Est. Salary $75k-$107k
    8 days ago 8d
    Job Title : ASIC Physical DesignEngineer Job Location : San Diego & San Jose, CA Job Description : This person will… gate ASICs Working Knowledge of Modem Architecture and HDL languages like verilog to be able to work with logic design team…
  • 3.4
    AMD – Sunnyvale, CA
    Est. Salary $88k-$120k
    NEW
    team is looking for a Logic DesignEngineer who has experience working on complex IP/SOC Designs from concept to post silicon.… involved in: Designof IP micro-architectural level, making design trade-offs. Responsible for IP block level implementation…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $91k-$136k
    17 days ago 17d
    will collaborate with ASICdesign teams in the Central Hardware Group, board/system hardware engineers in various business units… Implementation flow. Who You Are You are an ASICDesign for Test(DFT) engineer with 7+ years of experience including: Excellent…
  • 2.8
    GLOBALFOUNDRIES – Santa Clara, CA
    24 days ago 24d
    quality ASICdesigns Gather requirements and product specifications from synthesis, design for test, physical design, and timing… utilizing CMOS cell-based ASIC technologies. Essential Responsibilities: Implementation of electronic design automation software…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $135k-$173k
    14 days ago 14d
    supporting ASIC, FPGA and Palladium platforms SoC level DFT and test structures for ATE working closely with ASIC Vendor Work… Responsibilities: Participate in the SSD Controller ASIC HW & FW specification development SoC top level integration…
  • Fujitsu Network Communications – Sunnyvale, CA
    Est. Salary $107k-$139k
    7 days ago 7d
    en/ We are seeking a seasoned Front-end DesignEngineer for our ASIC business unit. The primary responsibilities… customer design wins successfully. Support customer’s design through all phases of ASIC execution. Focus on design execution…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $113k-$153k
    NEW
    forwarding was performed in dedicated ASICdesigns. These days we are looking to make those ASICs more general and programmable. P4… Experience in high-performance ASIC verification. Good understanding of ASICdesign and verification methodologies and flows…
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