ASIC Design Senior Staff Engineer Jobs in Santa Clara, CA | Glassdoor
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ASIC Design Senior Staff Engineer Jobs in Santa Clara, CA

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  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $127k-$167k
    NEW
    Digital Processor ASIC/FPGA Designer: The SeniorStaffASIC/FPGA DesignEngineer will be working in the RF Center of Excellence… the effort to meet the customer requirements. The SeniorStaff FPGA/ASICdesigner will provide technical support across the enterprise…
  • 3.1
    Huawei Technologies – Santa Clara, CA
    21 days ago 21d
    innovation to deliver a better future...faster. SeniorStaffEngineer - ASICDesign Location: Santa Clara, CA (R&D) Req #:… electrical engineering or equivalent. At least 10 years of industrial experience in ASICdesign Solid ASICdesign experience…
  • Cohere Technologies, Inc – Santa Clara, CA
    Est. Salary $92k-$119k
    5 days ago 5d
    open position for a Senior FPGA/ASICDesignEngineer in our Santa Clara office. In this position, you will design, implement and test… perform the detailed design and verification. This position reports directly to the Director of FPGA/ASICEngineering Required Qualifications…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $92k-$118k
    24 days ago 24d
    Descriptions: The ASICDesignEngineer will be working on the leading edge SSD controller IP design from architecture to production… support physical design and system level analysis. Qualifications: BS, MS, or PhD in Electrical Engineering with 5-10 years…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $84k-$113k
    NEW
    Digital Processor ASIC/FPGA Designer: The StaffASIC/FPGA DesignEngineer will be working in the RF Center of Excellence (RF… following tasks. Participate as a senior member of a small technical team of ASIC/FPGA designers to achiev project goals. Assist…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $121k-$177k
    NEW
    the design/architecture uses the IPs effectively. Understand High Level Synthesis (HLS) in the context of FPGAs or ASICs; good… the design/architecture uses the IPs effectively. Understand High Level Synthesis (HLS) in the context of FPGAs or ASICs; good…
  • 3.5
    QuickLogic – Sunnyvale, CA
    Est. Salary $110k-$144k
    6 days ago 6d
    Posted On06/22/2017 SeniorStaff, DesignEngineer Sunnyvale Salary Range : Worker Category… digital simulator such as VERILOG Highly Desirable: ASICdesign experience Product development experience CAD experience…
  • 3.9
    Synaptics – San Jose, CA
    25 days ago 25d
    qualified applicants to apply for a career opportunity as a SeniorStaffASIC Architect in our Platform Architecture department. This… architectures for the next-generation of touch-sensing and fingerprint ASIC’s. A solid understanding of analog and digital circuitry is required…
  • 3.0
    Achronix Semiconductor – Santa Clara, CA
    Est. Salary $122k-$165k
    8 days ago 8d
    process technologies. Position Profile Name: SeniorStaff Applications Engineer Type of Position: Regular, Exempt Reports… Job Description and Responsibilities The SeniorStaff Applications Engineer will be a key member of the Applications team…
  • 3.2
    Seagate Technology – Fremont, CA
    Est. Salary $107k-$145k
    16 days ago 16d
    innovation, seeks an ASICDesignEngineer for an exciting role at our new Freemont Design Center. The SeniorStaffEngineer position is… understanding of ASICdesign methodology, high speed CMOS circuit and logic design knowledge including arithmetic unit designs such as…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $131k-$193k
    18 days ago 18d
    plus) Fundamental experience with EDA tools for FPGA and ASICdesigns. Experience with Vivado, ISE or Quartus required (ModelSim… environment is a plus In-depth knowledge of VHDL or Verilog design for ASIC and FPGA Excellent written and verbal communication skills…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $106k-$147k
    6 days ago 6d
    translation layer Knowledge in FPGA design flow (Xilinx or Altera) Knowledge in ASICdesign flow and front-end toolchains Good… circuit design Out of the box thinking Preferred Qualifications: PhD in Computer Science, Electrical Engineering or Mathematics…
  • 3.8
    Synopsys – Mountain View, CA
    8 days ago 8d
    VHDL) and has a strong understanding of ASICdesign flow, VLSI, and/or CAD engineering. Knowledge of competitive EDA tool products… understanding of the design process, strong communication skill. Has a basic overall understanding of the design process. Strong communication…
  • 3.6
    Broadcom – San Jose, CA
    Est. Salary $87k-$119k
    23 days ago 23d
    implementations This requisition is approved for the SeniorStaffEngineer level. At this level, candidates should have BSEE w/… implementing, and testing high performance communications/networking ASIC products. Candidates with other qualifications will be considered…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $101k-$132k
    NEW
    modules and resolve issues. Debug and solve the bugs on FPGA/ASIC environment. Proactively contribute in teamwork. Proactively… Excellent code and design review skills. Ability to generate product level quality output. Experience in software design and programming…
  • 3.2
    Avago Technologies – San Jose, CA
    Est. Salary $93k-$126k
    25 days ago 25d
    implementations This requisition is approved for the SeniorStaffEngineer level. At this level, candidates should have BSEE w/… implementing, and testing high performance communications/networking ASIC products. Candidates with other qualifications will be considered…
  • 2.7
    Microsemi – San Jose, CA
    Est. Salary $103k-$138k
    15 days ago 15d
    radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices… of highly motivated engineers Must be willing and able to learn new technologies and take on new design challenges. Innovative…
  • 3.8
    ASML – San Jose, CA
    Est. Salary $72k-$100k
    21 days ago 21d
    module level Analog and mixed signal ASICdesign and tapeout Analog and mixed signal ASIC PCB level integration Education… circuit board (PCB) layout, PCB prototyping, tuning and debugging, ASIC tapeout, pilot production, and technical document writing. The…
  • 4.2
    ASIC North, Inc. – San Jose, CA
    30+ days ago 30d+
    complementing customers existing design teams, and providing engineeringstaff as needed. In addition, ASIC North develops and provides… Manager at ASIC NorthWilliston, Vermont Industry Semiconductors Employment type Full-time Experience Mid-Senior level…
  • 3.3
    Magma Design – Mountain View, CA
    21 days ago 21d
    VHDL) and has a strong understanding of ASICdesign flow, VLSI, and/or CAD engineering. Knowledge of competitive EDA tool products… understanding of the design process, strong communication skill. Has a basic overall understanding of the design process. Strong communication…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $101k-$132k
    6 days ago 6d
    modules and resolve issues. Debug and solve the bugs on FPGA/ASIC environment. Proactively contribute in teamwork. Proactively… Excellent code and design review skills. Ability to generate product level quality output. Experience in software design and programming…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $101k-$132k
    9 days ago 9d
    modules and resolve issues. Debug and solve the bugs on FPGA/ASIC environment. Proactively contribute in teamwork. Proactively… Excellent code and design review skills. Ability to generate product level quality output. Experience in software design and programming…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $107k-$138k
    27 days ago 27d
    VMWare), OCP and I/O devices is good to have. Experience with ASIC/FPGA systems bring-up, testing, and debugging is a plus. Experience… and drive closure of open issues. Design and carry out product validation tests based design and customer specifications incorporating…
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