Computer Systems Engineer/Architect ( Senior ASIC Design Jobs in Santa Clara, CA | Glassdoor
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Computer Systems Engineer/Architect ( Senior ASIC Design Jobs in Santa Clara, CA

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  • 3.1
    Rambus – Sunnyvale, CA
    Est. Salary $101k-$138k
    4 days ago 4d
    teams including ASICdesignengineers and architects, other verification engineers and system test engineers, security experts… Rambus Security Division (RSD) is hiring a talented SeniorASIC Verification Engineer to join our world class technology team in our…
  • 4.4
    NVIDIA – Santa Clara, CA
    Est. Salary $142k-$190k
    6 days ago 6d
    looking for a SeniorASIC Verification Engineer: NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation… future of computing. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation…
  • 3.7
    Infinera – Sunnyvale, CA
    Est. Salary $134k-$180k
    6 days ago 6d
    protocols is a plus. Experience with architecting and designing highly scalable packet forwarding engine and real-time embedded system… development strategy Work closely with System Engineers, Hardware/Software Architects and Marketing to specify architecture and provide…
  • 4.0
    Axelon, Inc. – San Jose, CA
    Est. Salary $99k-$135k
    4 days ago 4d
    We are currently looking for a SeniorASIC/SoC Verification Engineer (Contract Position) to join our team in San Jose, CA. He… Verification architecture and design of leading edge networking, storage, embedded computingASIC and/ or FPGA. Responsibilities…
  • 3.4
    Micron – Milpitas, CA
    14 days ago 14d
    Engineering/Electrical Engineering. Minimum Experience : 5 years with Atleast 3 years in ASICDesign Position is not open to NCG… and Soc Design , FPGA design Flow is a plus The position typically requires Masters ComputerEngineering or PhD Computer Engineering…
  • 4.0
    Cadence Design Systems – San Jose, CA
    Est. Salary $143k-$183k
    20 days ago 20d
    application engineers on solving customer reported issues. Help with bringup, integration, and validation of ASIC and ASIC/FPGA-based… Key responsibilities Develop FPGA designs and subsystems (in some cases involving ASICs), from concept to productization including…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $83k-$112k
    24 days ago 24d
    Electrical Engineering or ComputerEngineeringComputer Science with at least 10 years of experience in IC/ASICDesign or Computer Aided… experience in CMOS Design, ASICDesign, VLSI and Device Physics Experience interfaceing with engineers, senior managers and stakeholders…
  • 3.7
    Xilinx – San Jose, CA
    Est. Salary $133k-$197k
    14 days ago 14d
    proposals to customer project managers, engineering managers, system architects and designengineers Code and implement circuits to… plus) Fundamental experience with EDA tools for FPGA and ASICdesigns. Experience with Vivado, ISE or Quartus required (ModelSim…
  • 2.8
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $103k-$142k
    5 days ago 5d
    Physical Design team to implement design Qualifications: BS, MS or PhD degree in Electrical Engineering or Computer Science… Responsibilities: Work a team member to architect and develop IP cores Produce architecture and micro-architecture document…
  • 4.0
    Cadence Design Systems – San Jose, CA
    NEW
    processing ASICs and FPGAs, and is interested in establishing SI/PI system budgets and implementing the advanced design validation… experienced, well-accomplished Senior Principal SERDES System Architecture and Validation Engineer who is interested in challenging…
  • 3.4
    Micron – Milpitas, CA
    Est. Salary $118k-$155k
    14 days ago 14d
    Customers Proven track record as the lead architect and RTL designer of Gen3 PCI Express IP / ASICs that is in production in multiple… of these products. You will collaborate with ASICdesigners and other engineering departments including system architecture, hardware…
  • 3.7
    Xilinx – San Jose, CA
    Est. Salary $122k-$179k
    16 days ago 16d
    SAT solvers and timing analysis engines is desirable. Strong background in basic digital design principles, graph theory and data… optimizations, logic optimization and technology mapping algorithms for ASIC or FPGA synthesis tools is desirable. Hands on experience in…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $88k-$134k
    NEW
    definition and ASICdesign implementation, plus a minimum plus a minimum of 15+ years in an engineeringdesign discipline Knowledge… JOB OVERVIEW: Toshiba System LSI Group offers custom ASIC and Structured Array (FFSATM) solutions to its customers for development…
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