Digital ASIC Design Engineer Jobs in Santa Clara, CA | Glassdoor
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Digital ASIC Design Engineer Jobs in Santa Clara, CA

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  • 4.2
    Quanergy – Sunnyvale, CA
    Est. Salary $81k-$106k
    16 days ago 16d
    The DigitalASICDesignEngineer at Quanergy will be responsible for collaboratively developing control and digital signal processing… characterize/test the performance of the designedASIC, and work to integrate the design into our LiDAR sensors. A successful…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $86k-$109k
    9 days ago 9d
    control, supporting P&R, design rule checks RTL design and give design review. Work with testing engineer to evaluate, validate and… Responsible for design, development, modification and evaluation of high-speed digital circuit for signal processing components…
  • 3.8
    Encore Semi – San Jose, CA
    EASY APPLY
    Est. Salary $105k-$142k
    4 days ago 4d
    Successful ASICDigitalDesignEngineer will be responsible for participating in, the design of leading edge ASICs for multi-function… ASICDigitalDesignEngineer Work Location: San Jose, CA Status: Permanent - Full-time Compensation: Salary + Bonus +…
  • 3.6
    Fortinet – Sunnyvale, CA
    Est. Salary $87k-$114k
    14 days ago 14d
    Description Fortinet ASICdesign team is looking for a top computer engineering or electrical engineering graduate with an interest… member of the ASICdesign team, you will help design Fortinet’s next generation Network Processor and System-On-Chip ASIC to accelerate…
  • 3.6
    Qualcomm – Santa Clara, CA
    Est. Salary $92k-$122k
    4 days ago 4d
    successful candidate for this position will specify and designdigitalASIC blocks in our Multimedia Graphics team that will be integrated… position, the designer will be responsible for architecture and micro-architecture design of the ASIC, RTL design and synthesis…
  • 1.0
    Asquare, Inc – Onizuka AFB, CA
    8 days ago 8d
    Job Title: ASIC/RTL DesignEngineer Location: Sunnyvale, CA Job Code: JP00000777 Duration: 6 months contract (with possibility… participating in, the design of leading edge SoCs in advanced digital CMOS processes. · Our RTL DesignEngineers are expected contribute…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $79k-$105k
    18 days ago 18d
    stages of ASICdesign flows, and is experienced with state-of-the-art design tools. The candidate is strong in logic design and verification… production engineers and customers. Looking for the candidate who is familiar with digital IC design methodologies, understands…
  • 3.6
    Qualcomm – San Jose, CA
    8 days ago 8d
    Job Id E1956137 Job Title DigitalASIC Synthesis Engineer Post Date 06/15/2017 Company - Division… degree in Electrical Engineering and at least 4 or 2 years, respectively, of industry experience in digital synthesis, including…
  • 3.3
    Magma Design – Mountain View, CA
    10 days ago 10d
    Business Title ASICDigitalDesign Engr, II Requisition Number 14050BR Hiring Location(s) USA - California - Mountain View… developing high-speed digital IP cores and/or SOCs Knowledge of Verilog RTL, verification, IP deliverables, ASICdesign flow and tools…
  • 3.4
    Tektronix – Santa Clara, CA
    Est. Salary $102k-$135k
    6 days ago 6d
    The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL designers… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • Cohere Technologies, Inc – Santa Clara, CA
    Est. Salary $92k-$119k
    27 days ago 27d
    Senior FPGA/ASICDesignEngineer in our Santa Clara office. In this position, you will design, implement and test digital communications… perform the detailed design and verification. This position reports directly to the Director of FPGA/ASICEngineering Required Qualifications…
  • 3.8
    Marvell Technology – Santa Clara, CA
    18 days ago 18d
    CS, required. - A minimum 5 years of experience with digitalASICdesign, required. - Hands on experience with SOC verification… to observe the functionality of designs flow. We are looking for a Highly motivated engineer to join our team. - BS/MS in…
  • 4.0
    Apple – Santa Clara, CA
    11 days ago 11d
    solutions. System-level design and IC micro-architecture definition of complex digital and mixed-signal ASICS including requirements… and characterization plans for touch system ASIC’s FPGA emulation system design, lead pre-silicon system validation, prototype…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $93k-$126k
    10 days ago 10d
    definition, design, verification, and documentation for Xilinx ASIC development. Determine architecture design, logic design, and system… ECC (Error Correction Code) designs Verilog or VHDL and DigitalDesign Principles Design experience with Communication…
  • 3.7
    Intel – San Jose, CA
    Est. Salary $90k-$116k
    17 days ago 17d
    following:BS in Electrical Engineering or equivalent with a minimum of 8 years of experience in digital backend designDirect experience… Job Description Component DesignEngineers are responsible for the design and development of electronic components. Responsibilities…
  • 3.7
    Intel – San Jose, CA
    Est. Salary $90k-$116k
    24 days ago 24d
    or Masters degree in Electrical Engineering. 6 (+) months experience in digital logic design with RTL Verilog or VHDL. 6 (+… Job Description Develop Ethernet ASIC IP for Intel Programmable Solutions Group PSG FPGAs. Your responsibilities will include…
  • 3.8
    Synopsys – Mountain View, CA
    10 days ago 10d
    Business Title ASICDigitalDesign Engr, II Requisition Number 14050BR Hiring Location(s) USA - California - Mountain View… developing high-speed digital IP cores and/or SOCs Knowledge of Verilog RTL, verification, IP deliverables, ASICdesign flow and tools…
  • 3.7
    Fortive – Santa Clara, CA
    Est. Salary $95k-$126k
    5 days ago 5d
    The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL designers… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • 3.2
    Seagate Technology – Fremont, CA
    Est. Salary $107k-$145k
    10 days ago 10d
    innovation, seeks an ASICDesignEngineer for an exciting role at our new Freemont Design Center. The Senior Staff Engineer position is… all aspects of digitaldesign activities for multi-million gates Application Specific Integrated Circuit (ASIC) using deep-submicron…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $90k-$124k
    NEW
    Computer Engineering 5+ years of relevant experience in digitaldesign Good knowledge in languages relevant to the ASIC development… developing the Nervana Engine, an application specific integrated circuit (ASIC) that is custom-designed and optimized for deep…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $101k-$127k
    9 days ago 9d
    Responsible for design, development, modification and evaluation of high-speed digital circuit for signal processing components… timing simulation and verification, preparing design review. Work with testing engineer to evaluate, validate and debug silicon device…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $84k-$113k
    NEW
    ASIC & FPGA development on R&D program. Junior engineer with experience developing, testing, and integrating digital signal… technical oversight. Basic Qualifications FPGA & ASICDesign and development experience. Language Proficient in VHDL…
  • 2.9
    Fluke Corporation – Santa Clara, CA
    Est. Salary $88k-$116k
    6 days ago 6d
    The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL designers… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • 3.4
    Advanced Micro Devices, Inc. – Sunnyvale, CA
    Est. Salary $103k-$140k
    13 days ago 13d
    Bachelors degree in Electrical or Computer Engineering and 8 years Physical Design/CAD experience or Masters degree and 6 years… skills (Perl, Python and/or TCL) Strong understanding of digital circuits Experience with flow automation Expert knowledge…
  • 4.4
    Google – Mountain View, CA
    Est. Salary $98k-$122k
    24 days ago 24d
    of complex digitaldesign blocks by fully understanding the design specification and interacting with designengineers to identify… use your design and verification expertise to verify complex digitaldesigns. You will collaborate closely with design and verification…
  • 3.1
    Aquantia – San Jose, CA
    EASY APPLY
    Est. Salary $79k-$100k
    21 days ago 21d
    ___________ Qualifications: • Full understanding of digitaldesign verification methodologies and tools including: • Expertise… and Experience: • BS+8 or MS+6 (preferred) in Electrical Engineering, Computer Science or related • Minimum 8-12 years of hands-on…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $84k-$113k
    14 days ago 14d
    customers. Lead a team of designers. Basic Qualifications Experience in FPGA or ASICdesign HDL programming experience… successful candidate will have experience in the following ASIC and FPGA design activities with minimal level of oversight: Draft…
  • 3.2
    Rambus – Sunnyvale, CA
    Est. Salary $101k-$138k
    NEW
    teams including ASICdesignengineers and architects, other verification engineers and system test engineers, security experts… of effective verification of complex digitaldesigns. Solid understanding of standard ASIC verification techniques, including:…
  • 4.0
    Apple – Santa Clara, CA
    NEW
    well as DigitalASIC Architects. Key Qualifications Qualifications and Requirements: Strong electrical engineering background… fosters engineering excellence, creativity, and innovation. We are looking for Sensor ASIC Architects to help develop ASICS for…
  • 3.2
    Omnivision Technologies, Inc – Santa Clara, CA
    Est. Salary $81k-$113k
    10 days ago 10d
    production, to customer support. In-depth hands-on experience in ASICdesign flow: RTL coding, simulation, synthesis, static timing analysis… h/w design. Extensive knowledge of RISC and video processing. Minimum MSEE + 6 years or BSEE + 8 years of digitaldesign experience…
  • 3.3
    Sony Electronics – San Jose, CA
    Est. Salary $90k-$122k
    18 days ago 18d
    and design. Sony Electronics, a global leader in image sensors, is seeking a staff VLSI/ASIC logic DesignEngineer to work… working on complex digitaldesigns but the Designengineer will also work closely with analog/algorithm/system engineers performing in…
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