Senior ASIC Verification Engineer Jobs in Santa Clara, CA | Glassdoor
  • All Jobs (75)

Senior ASIC Verification Engineer Jobs in Santa Clara, CA

Filters
Filters
  • 4.4
    NVIDIA – Santa Clara, CA
    Est. Salary $138k-$185k
    9 days ago 9d
    We're now looking for a Senior ASIC Verification Engineer:Nvidia’s invention of the GPU 1999 sparked the growth of the PC gaming… responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies…
  • 4.0
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    Est. Salary $91k-$121k
    5 days ago 5d
    skills in Verilog Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design… micro-architecture, implementation (using Verilog), and verification. Expected skills: 5+ years hands-on experience with…
  • 3.0
    Innovative Logic Inc. – San Jose, CA
    Est. Salary $92k-$125k
    2 days ago 2d
    We are looking for UVM Verification engineer with the followings skills. You have to spend most of the time writing test benches… SystemVerilog, UVM, C, Verilog · Good understanding of new verification concepts Nice to Have o ARM SOC knowledge, AHP, APB…
  • 3.0
    Toshiba – San Jose, CA
    Est. Salary $66k-$92k
    30+ days ago 30d+
    will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
  • 3.3
    Toshiba America Business Solutions – San Jose, CA
    Est. Salary $66k-$92k
    23 days ago 23d
    will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
  • Advanced Technology Search – San Jose, CA
    Est. Salary $91k-$142k
    16 days ago 16d
    Description ASIC/IP Verification Engineer ASIC/Layout Design Engineer: Oversees definition, design, verification, and documentation… development, part of the ASIC solution for storage applications. They are looking for a Senior Verification Engineer, who will be a key…
  • 3.0
    Innovative Logic Inc. – San Jose, CA
    Est. Salary $92k-$125k
    30+ days ago 30d+
    We are looking for a Senior Verification Engineer who has recent experience in NPU or Network switch · 5+ years of have… have experience in Verification using System Verilog / Verilog · 2+ years of hands on experience in Network Switch or NPU · Recent…
  • 4.4
    NVIDIA – Santa Clara, CA
    23 days ago 23d
    We are now looking for a Senior ASIC Power Engineer: In this role you will be responsible for crafting and implementing the… Tesla products. As a senior team member, you will collaborate closely with Architecture, Software, ASIC, VLSI, DFT, Layout, and…
  • 3.1
    Tektronix – Santa Clara, CA
    Est. Salary $112k-$146k
    8 days ago 8d
    Job Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers… Requirements o Internship/industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity…
  • 2.9
    Avago Technologies – Santa Clara, CA
    Est. Salary $103k-$134k
    20 days ago 20d
    with design engineers to verify fixes. ○ Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. ○ Replicate… initiatives. As a verification engineer, your responsibilities will include: ○ Architect block and full-chip verification environments…
  • 3.5
    Broadcom – Santa Clara, CA
    Est. Salary $102k-$137k
    26 days ago 26d
    Create verification environments using Systemverilog and Universal verification methodology-UVM for Panel Scan Engine-PSE, Hardware… interfaces. Integrate Matlab and C model into SoC and Block level verification Environments. Develop test plans and coverage metrics from…
  • 2.9
    Fluke Corporation – Santa Clara, CA
    Est. Salary $92k-$120k
    8 days ago 8d
    Job Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers… Requirements o Internship/industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity…
  • 3.1
    Fortive – Santa Clara, CA
    Est. Salary $95k-$124k
    8 days ago 8d
    Job Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers… Requirements o Internship/industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity…
  • 3.8
    Nokia – Sunnyvale, CA
    5 days ago 5d
    techniques. As a Senior ASIC Designer, you will effectively communicate your design ideas to fellow engineers and Lead Architect… requirements: • 8 years of ASIC digital design experience • Experienced the full cycle production level ASIC design and tape out…
  • 4.9
    Light.co – Palo Alto, CA
    Est. Salary $99k-$128k
    3 days ago 3d
    radically change photography. As our ASIC Design Engineer, you will be responsible for the full ASIC design cycle for our game-changing… experience and process knowledge of ASIC design, synthesis, static timing analysis, formal verification, clock domaincrossing, and low…
  • Von Mizener Consulting – Santa Clara, CA
    EASY APPLY
    8 days ago 8d
    Job Title: Senior Verification Engineer Seek a talented Senior Verification Engineer for regular employment or temporary employment… , HVL, Hardware Verification Language, Vera, Specman, 'e, Constrained Random, SoC Verification, Verification Plans, Assertion…
  • 3.3
    Micron – Milpitas, CA
    Est. Salary $125k-$174k
    24 days ago 24d
    architect, and developer of a UVM verification environment for verification of a controller ASIC and associated system performance… Req Id: 79243 As a Senior Staff Verification Engineer in the System Modeling Group at Micron Semiconductor Products, Inc.,…
  • 3.3
    Toshiba America Business Solutions – San Jose, CA
    Est. Salary $71k-$93k
    17 days ago 17d
    the SSD Controller ASIC HW & FW specification development Detailed module design and functional verification Responsible for… level verification and timing Port designs into FPGA prototyping and emulation platforms Work closely with FW engineers to resolve…
  • Approgence – San Jose, CA
    Est. Salary $79k-$105k
    11 days ago 11d
    analysis and post silicon verification support. - Modem ASIC Design team is working with system engineer to understand wireless standards… Job Title : Senior ASIC/ RTL Design Engineer with DSP Job Location : San Diego & San Jose, CA Job Description : This…
  • 2.5
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $93k-$121k
    17 days ago 17d
    Descriptions: The ASIC Design Engineer will be working on the leading edge SSD controller IP design from architecture to production… Drive architecture or storage systems, DDR, PCIe, UVM based verification. Posted by StartWire…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $85k-$114k
    24 days ago 24d
    experience in CMOS Design, ASIC Design, VLSI and Device Physics - Experience interfaceing with engineers, senior managers and stakeholders… in Electrical Engineering or Computer Engineering Computer Science with at least 10 years of experience in IC/ASIC Design or Computer…
  • Approgence – Santa Clara, CA
    Est. Salary $89k-$123k
    17 days ago 17d
    Job Title : Senior FPGA/Validation/Verification Engineer (Native Spanish Speaker) Job Location : Santa Clara, CA Job… This is a FULL TIME position for a very big leading Modem HW ASIC group. The group is engaged in the development of digital baseband…
  • Avalanche Technology – Fremont, CA
    Est. Salary $93k-$119k
    5 days ago 5d
    current verification capabilities and flows Requirements 4+ years of experience in ASIC/Memory design verification Experience… Description Job Description & Responsibilities As a Senior verification design engineer at Avalanche Technology Inc., you will work with…
  • Avalanche – Fremont, CA
    Est. Salary $102k-$151k
    6 days ago 6d
    current verification capabilities and flows Requirements 4+ years of experience in ASIC/Memory design verification Experience… Job Description & Responsibilities As a Senior verification design engineer at Avalanche Technology Inc., you will work with…
  • Paradigm Works – Santa Clara, CA
    Est. Salary $81k-$110k
    19 days ago 19d
    of large, high-performance ASICs and chip sets. We seek a talented Senior Verification Engineer for Regular Employment OR… Job Title: Sr. Verification Engineer Thank you, for your review and consideration of our position opportunities. We look…
  • Barefoot Networks, Inc. – Palo Alto, CA
    EASY APPLY
    Est. Salary $87k-$110k
    2 days ago 2d
    Primary Responsibilities: Senior DV engineer responsible for defining and implementing verification methodology and verifying… Any Networking ASIC background is definite plus Exposure to UVM is a definite plus Any formal verification experience is a…
  • Approgence – Santa Clara, CA
    Est. Salary $89k-$123k
    17 days ago 17d
    Job Title : Senior FPGA/Validation/Verification Engineer (only Technical Women Candidates) Job Location : Santa Clara,… This is a FULL TIME position for a very big leading Modem HW ASIC group. The group is engaged in the development of digital baseband…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $102k-$138k
    9 days ago 9d
    System Verilog or similar verification languages/tools; UVM/OVM verification methods -Synopsys ASIC design tools - VCS simulator… Integration and maintenance of HDL models and verification environments for simulation and ASIC logic synthesis. -Execution and debug…
  • Precision ERP – San Jose, CA
    Est. Salary $70k-$100k
    30+ days ago 30d+
    Position: Senior Design Engineer - Digital IP Location: San Jose, CA Required: - BS/MS in Electrical Engineering or relevant… power - Proficient with Verilog/VHDL, scripting languages, verification methodologies, tool flow - Full design flow experience…
  • 3.5
    Broadcom – Santa Clara, CA
    Est. Salary $119k-$158k
    6 days ago 6d
    Ability to provide mentorship and guidance to junior and senior engineers, and be an effective team player Ability to effectively… experience with BSEE/BSCS or 5+ years with MSEE/MSCE in ASIC Physical Design from RTL to GDSII Strong experience in Physical Design…
  • 4.4
    NVIDIA – Santa Clara, CA
    Est. Salary $162k-$235k
    3 days ago 3d
    experience. First hand work experience with the ASIC design process and architecture of mobile SoCs You have directly worked on several… You have an MS or PhD in Electrical Engineering, Computer Science or Computer Engineering with 10+ years of relevant experience…
Page 1 of 3
Be the first to get new jobs like these: