Senior ASIC and Systems Design Engineer Jobs | Glassdoor

Senior ASIC and Systems Design Engineer Jobs

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  • 4.0
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    Est. Salary $93k-$122k
    1 days ago 15hr
    -end complex RTL design Programming skills in Verilog Must be familiar with all stages of the ASIC design flow (including specification… of computer graphics and low-power design techniques a plus Experience of GPU shader design a plus…
  • 3.2
    L-3 Communications – Camden, NJ
    Est. Salary $77k-$105k
    1 days ago 18hr
    Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible… Position Description: Senior ASIC/FPGA Design Engineer L-3 Communications – Communication Systems East (L-3 CS-East)…
  • 3.7
    Peregrine Semiconductor – San Diego, CA
    Est. Salary $131k-$175k
    6 days ago 6d
    in sensor ASIC design (ADC, temperature sensors, regulators, analog comparators, digital interfaces), analog design, and have… focuses on the department management, development, and design of CMOS ASIC (Application Specific Integrated Circuits) for ultra…
  • 4.4
    SpaceX – Irvine, CA
    Est. Salary $109k-$142k
    5 days ago 5d
    life on Mars. SENIOR ASIC DESIGN ENGINEER RESPONSIBILITIES: As a Senior Design Engineer youll help design, implement and verify… FPGAs and/or ASICs. Participate in the micro architecture and design partition within the ASIC/FPGA. Implement design blocks using…
  • 3.8
    Nokia – Sunnyvale, CA
    1 days ago 19hr
    of conventional design techniques. As a Senior ASIC Designer, you will effectively communicate your design ideas to fellow… requirements: • 8 years of ASIC digital design experience • Experienced the full cycle production level ASIC design and tape out •…
  • 3.9
    Infinera – Sunnyvale, CA
    Est. Salary $143k-$183k
    6 days ago 6d
    new or junior circuit designers and layout engineers; Independently resolves issues and conquer design challenges; Self-motivated… guidelines to layout engineers, need to be hands on in drawing layout if necessary; Be meticulous about all design and layout details…
  • 3.8
    Cisco Systems – San Jose, CA
    Est. Salary $121k-$161k
    1 days ago 21hr
    forwarding was performed in dedicated ASIC designs. These days we are looking to make those ASICs more general and programmable. P4… domain-specific languages. - Ability to communicate with ASIC engineers. Why Cisco We connect everything: people, processes, data…
  • L3 Technologies – Camden, NJ
    Est. Salary $72k-$96k
    8 days ago 8d
    Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible… Job Description !*! Position Description\: Senior ASIC/FPGA Design Engineer L3 Technologies (formerly L-3 Communications)…
  • 3.8
    Nokia – Sunnyvale, CA
    1 days ago 20hr
    Responsibility Area: He/she has the senior responsibility for specifying, planning, reporting, designing and reviewing in his/her technical… Responsibility Area: He/she has the senior responsibility for specifying, planning, reporting, designing and reviewing in his/her technical…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $122k-$166k
    5 days ago 5d
    Senior ASIC Design Engineer - Cache Job Number: 52167565 Santa Clara Valley, California, United States Posted: Apr. 14,… Qualifications The ideal candidate will have 5+ years of ASIC design experience: 5+ years of development of memory system.…
  • 3.6
    Raytheon – Dallas, TX
    21 days ago 21d
    these areas. ·Minimum of 6+ years of ASIC Synthesis and Static timing analysis design experience ·Minimum of 5+ years of experience… of system-on-chip Application Specific Integrated Circuits (ASIC) Developments for Space & Airborne Systems as evidenced by at…
  • 4.9
    Light.co – Palo Alto, CA
    Est. Salary $102k-$132k
    26 days ago 26d
    change photography. As our ASIC Design Engineer, you will be responsible for the full ASIC design cycle for our game-changing… is needed to create an ASIC from conception to implementation Work with Light partners on ASIC design What you bring to Light…
  • 3.4
    AMD – Sunnyvale, CA
    Est. Salary $103k-$132k
    14 days ago 14d
    The AMD memory controller team is looking for a asicdesign engineer for post silicon validation andthe firmware layer for its next… other debuggers; · Proficient in software development / engineering in C/C++, and experience with assembly code development;…
  • 3.6
    Light – Palo Alto, CA
    Est. Salary $122k-$159k
    15 days ago 15d
    change photography. As our ASIC Design Engineer, you will be responsible for the full ASIC design cycle for our game-changing… is needed to create an ASIC from conception to implementation Work with Light partners on ASIC design What you bring to…
  • InPLAY Technologies – Irvine, CA
    Est. Salary $81k-$105k
    29 days ago 29d
    Job Description Senior ASIC Design Engineer A 9-12 month contract position (with possibility to extend to a full time position… experience working with complex FPGAs and/or ASICs. 5+ years of experience in Verilog / System Verilog Knowledge of SVN or GIT version…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $123k-$167k
    11 days ago 11d
    As a senior member of the SOC Design team you will be responsible for the following 1) Microarchitecture and design of RTL code… system Design, Design verification, Physical Design, DFT, and power teams to achieve first tapeout success on designs 4) Develop…
  • 3.1
    Huawei Technologies – San Diego, CA
    13 days ago 13d
    innovation to deliver a better future...faster. Senior Staff Engineer - ASIC Design Location: San Diego, CA (R&D) Req #: 8342… electrical engineering or equivalent. At least 10 years of industrial experience in ASIC design Solid ASIC design experience…
  • Cadence – San Jose, CA
    Est. Salary $82k-$108k
    9 days ago 9d
    * Aware of ASIC design flow. Experience with some frontend design tools such as Incisive/NCSim, Genus/Design Compiler, STA… technology team responsible for research and development of these ASIC engines and how they work as a system to reprogrammably emulate customers…
  • 3.5
    Rockwell Collins Company – Cedar Rapids, IA
    Est. Salary $67k-$93k
    7 days ago 7d
    Electrical Engineer - FPGA & ASIC Design Solutions - Government Systems Become part of the growing Government Systems Engineering FPGA… FPGA & ASIC Design Solutions team. As an engineer in this organization, you will be a member of an experienced, dynamic design group…
  • 4.1
    Cadence Design Systems – San Jose, CA
    Est. Salary $105k-$136k
    14 days ago 14d
    logic Aware of ASIC design flow. Experience with some frontend design tools such as Incisive/NCSim, Genus/Design Compiler, STA… technology team responsible for research and development of these ASIC engines and how they work as a system to reprogrammably emulate customers…
  • FirstPass Engineering – Denver, CO
    Est. Salary $83k-$114k
    30+ days ago 30d+
    Degree in Electrical or Computer Engineering with five to ten years of experience in the design of ASIC/IC devices. The following skills… development of a large ASIC or a component within an ASIC Capture and documentation of design requirements Design partitioning and…
  • 3.9
    Magic Leap, Inc. – Fort Lauderdale, FL
    Est. Salary $133k-$179k
    9 days ago 9d
    interacting with the world tomorrow. Job Description Senior FPGA/ASIC engineer with a minimum of 10 years experience in graphics… modeling experience. Point model design. Digital design RTL, model design, simulation, ASIC design and high volume production experience…
  • 3.4
    AMD – Boxborough, MA
    Est. Salary $101k-$136k
    4 days ago 4d
    A day in the life of a Physical Design Engineer If you are part of the Physical Design team making a multibillion gates SOC… Required to manage a team size from 10 to 100+ physical design engineers, plan and execute appropriate milestones to achieve the…
  • GigPeak – San Jose, CA
    EASY APPLY
    Est. Salary $106k-$155k
    1 days ago 1d
    Senior ASIC Design Engineer (Job Code WL) REPORTS TO: Director of ASIC Engineering LOCATION: San Jose, CA CLASSIFICATION:… currently seeking a Senior ASIC Design Engineer. Essential Duties and Responsibilities Management of ASIC design development Meet…
  • 4.1
    VanderHouwen – New York, NY
    6 days ago 6d
    bit.ly/2enTpQN Sr. Digital ASIC Designer Exceptionally accomplished Sr. Digital ASIC Designers are sought to join a New Yorkbased… multiple aspects of the implementation process. Sr. Digital ASIC Designer Qualifications Masters or PhD preferred. Experience with…
  • Approgence – San Jose, CA
    Est. Salary $83k-$110k
    6 days ago 6d
    Job Title : Senior ASIC/ RTL Design Engineer with DSP Job Location : San Diego & San Jose, CA Job Description : This… perform bit-exact simulation. - Modem ASIC Design team is working with physical design engineer to deliver netlist, spec timing constraints…
  • 3.4
    AMD – Boxborough, MA
    Est. Salary $101k-$136k
    4 days ago 4d
    Front-End design team and physical design team for large scale ASIC chip physical implementation. Focusing on physical design of deep… years or Bachelor with 5+ years of industrial experience in ASIC design 2. Hands on experienced in EDA tools like Encounter / Innovus…
  • 3.6
    Continental USA Tires – Santa Barbara, CA
    Est. Salary $89k-$120k
    2 days ago 2d
    * Design, simulate, implement and test digital circuits and systems using VHDL/Verilog based RTL design flow (FPGAs/ASICs) and… procedures. Job Requirements •BS/MS/PHD Electrical Engineering, Computer Engineering, or Physics. * Min. 5 years of experience years…
  • FIDUS SYSTEMS – United States
    Est. Salary $68k-$93k
    13 days ago 13d
    North American design partner and we solve some of their customers’ toughest design challenges. Our engineers are certified to… Floorplanning Provide lab support throughout project Opportunity for ASIC, SOC, and data path elements in addition to the FPGA 6+ month…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $112k-$153k
    13 days ago 13d
    Architecture, Design verification, Physical Design, DFT, and power teams to achieve first tapeout success on designs 3) Develop… aspects of development design for large SOC blocks including: Internal and external IP integration, design of system bus and control…
  • 3.6
    Continental – Santa Barbara, CA
    1 days ago 15hr
    billion in 2015. Auto req ID 62997BR Job Title Senior ASIC Mask/Layout Engineer Country United States Posting Location Santa… Job Description Responsibilities: •Responsible for mask design (layout) of cell­ level circuits, including drivers, buffers…
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