Senior ASIC Layout Design Engineer Jobs | Glassdoor
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Senior ASIC Layout Design Engineer Jobs

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  • 4.4
    SpaceX – Irvine, CA
    Est. Salary $108k-$142k
    8 days ago 8d
    life on Mars. SENIOR ASIC DESIGN ENGINEER RESPONSIBILITIES: As a Senior Design Engineer youll help design, implement and verify… with backend teams to address layout and timing issues for ASICs. Bring-up and validate ASICs and FPGAs in the lab. BASIC QUALIFICATIONS…
  • 3.4
    Advanced Micro Devices, Inc. – Boxborough, MA
    Est. Salary $99k-$133k
    30+ days ago 30d+
    A day in the life of a Physical Design Engineer If you are part of the Physical Design team making a multibillion gates SOC… Required to manage a team size from 10 to 100+ physical design engineers, plan and execute appropriate milestones to achieve the…
  • 4.1
    ASIC North, Inc. – Phoenix, AZ
    30+ days ago 30d+
    complementing customers existing design teams, and providing engineering staff as needed. In addition, ASIC North develops and provides… with development engineers will be required. Required: · Experience using the Cadence Virtuoso layout design tool. · Experience…
  • 3.6
    Continental USA Tires – Santa Barbara, CA
    2 days ago 2d
    and mixed signal CMOS design, simulation, and layout. * Understanding of low voltage mixedsignal design and high frequency low… substrate crosstalk issues, supporting optimal clock tree design in layout. * Support transition to mass production manufacturing…
  • GigPeak – San Jose, CA
    EASY APPLY
    Est. Salary $107k-$156k
    4 days ago 4d
    Senior ASIC Design Engineer (Job Code WL) REPORTS TO: Director of ASIC Engineering LOCATION: San Jose, CA CLASSIFICATION:… currently seeking a Senior ASIC Design Engineer. Essential Duties and Responsibilities Management of ASIC design development Meet…
  • 3.6
    Continental – Santa Barbara, CA
    Est. Salary $89k-$121k
    20 days ago 20d
    billion in 2015. Auto req ID 58793BR Job Title Senior Digital ASIC Designer Country United States Posting Location Santa… sizes. •Design, simulate, implement and test digital circuits and systems using VHDL/Verilog based RTL design flow (FPGAs/ASICs) and…
  • 3.3
    NeuroLogica – Danvers, MA
    Est. Salary $59k-$72k
    Today 10hr
    wireless chipsets, RFICs and power management ASICs · Drive planning and execution of design verification test, factory test planning… Hardware Test Engineer Reports To: Senior Systems Test Engineer Department: R & D Systems Quality Test Engineering Direct…
  • 4.4
    SpaceX – Redmond, WA
    Est. Salary $118k-$156k
    9 days ago 9d
    goal of enabling human life on Mars. SENIOR ASIC ENGINEER RESPONSIBILITIES: Implement ASIC / SoCs / FPGAs for multiple products… Masters degree in engineering or math. ASIC / FPGA / SoC System integration experience. Strong Silicon/ASIC design experience. One…
  • 4.4
    NVIDIA – Santa Clara, CA
    21 days ago 21d
    products. As a senior team member, you will collaborate closely with Architecture, Software, ASIC, VLSI, DFT, Layout, and Product… We are now looking for a Senior ASIC Power Engineer: In this role you will be responsible for crafting and implementing the…
  • 3.1
    Tektronix – Santa Clara, CA
    Est. Salary $112k-$146k
    14 days ago 14d
    The ASIC Mixed Signal engineer will be a member of the ASIC team in Santa Clara that interacts with Analog/circuit designers, digital… verilogA and .lib models for custom macro SAR ADC design, floor plan and layout Development AMS simulation environment at block…
  • 3.5
    HRL – Malibu, CA
    EASY APPLY
    1 days ago 24hr
    and carry out layout on critical performance elements. Implementation of GDSII for mixed signal ASICs comprised of digital netlists… Electrical Engineering ESSENTIAL JOB FUNCTIONS: Lead integration, verification, design trade-offs, supervise layout staff, and…
  • 2.9
    Fluke Corporation – Santa Clara, CA
    Est. Salary $92k-$120k
    14 days ago 14d
    The ASIC Mixed Signal engineer will be a member of the ASIC team in Santa Clara that interacts with Analog/circuit designers, digital… verilogA and .lib models for custom macro SAR ADC design, floor plan and layout Development AMS simulation environment at block…
  • 3.1
    Fortive – Santa Clara, CA
    Est. Salary $95k-$124k
    14 days ago 14d
    The ASIC Mixed Signal engineer will be a member of the ASIC team in Santa Clara that interacts with Analog/circuit designers, digital… verilogA and .lib models for custom macro SAR ADC design, floor plan and layout Development AMS simulation environment at block…
  • Advanced Technology Search – San Jose, CA
    Est. Salary $91k-$142k
    14 days ago 14d
    Job Description ASIC/IP Verification Engineer ASIC/Layout Design Engineer: Oversees definition, design, verification, and… development, part of the ASIC solution for storage applications. They are looking for a Senior Verification Engineer, who will be a key…
  • 3.7
    Cirrus Logic – Austin, TX
    Est. Salary $92k-$132k
    14 days ago 14d
    mixed-signal designers developing ASICs for next generation MEMS based microphones. Participate in all aspects of design from concept… behavioral modeling Mentoring of junior engineers Good silicon debug skills Understanding of layout Understanding of reliability concerns…
  • 3.0
    Rambus – Chapel Hill, NC
    Est. Salary $79k-$107k
    20 days ago 20d
    validate SERDES, ASIC’s & Memory subsystems Creation of technical documentation including product specifications, layout instructions… FPGA design Expertise using Cadence (including Orcad), Mentor design tool and flows Schematic Design/Capture, PCB layout check…
  • 3.8
    Dialog Semiconductor – Campbell, CA
    Est. Salary $82k-$113k
    7 days ago 7d
    and post layout verification. • Collaboration with analog engineers and test engineers on analog testability design and debugging… continued growth, we seek a Senior Digital Design Engineer. The role Working in the Digital Design - Power Conversion Business…
  • 4.0
    Mentor Graphics – Irvine, CA
    Est. Salary $91k-$127k
    4 days ago 4d
    capture, layout, LVS (layout versus schematics) & DRC (design rule check) verification is a must. Knowledge of ASIC design flow and… Company: Mentor Graphics Job Title: Senior Circuit Design Engineer (IP memory design) - 5833 Job Location: U.S. – California…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $85k-$114k
    22 days ago 22d
    experience in CMOS Design, ASIC Design, VLSI and Device Physics - Experience interfaceing with engineers, senior managers and stakeholders… Electrical Engineering or Computer Engineering Computer Science with at least 10 years of experience in IC/ASIC Design or Computer…
  • 3.5
    ON Semiconductor – Bedford, PA
    Est. Salary $96k-$132k
    5 days ago 5d
    and other types of analog/mixed-signal ASICs. Ability to work at any level of the design is absolutely essential. Implement… Bedford, New Hampshire is seeking a seasoned Senior Electronic Design Engineering professional to join their local team to support…
  • 5.0
    Cameron Craig Group – Farmington, MI
    Est. Salary $59k-$85k
    4 days ago 4d
    technologies is essential. Familiarity in ASIC development and/or testing is a plus. Experience in design and analysis for FMEA is required… Senior Hardware Engineer (Brake Controls) Farmington, MI Summary of the Sr. Hardware Engineer (Brake Controls) One of our long…
  • 5.0
    JobJuncture – Farmington Hills, MI
    Est. Salary $65k-$91k
    2 days ago 2d
    technologies is essential. Familiarity in ASIC development and/or testing is a plus. Experience in design and analysis for FMEA is required… simulation. Interface with ECAD for PCB layout with compliance to EMC & manufacturing design rules. Control and release component…
  • 3.8
    Cisco Systems – Allentown, PA
    Est. Salary $68k-$92k
    7 days ago 7d
    highly-motivated Senior Lab Validation Engineer in the Allentown, Pennsylvania development site. * Partner with Software, ASIC Development… generators, BERT, Spectrum analyzers, PNA etc. 4. PCB design and Layout 5. FPGA prototyping 6. Signal Integrity knowledge 7…
  • 3.6
    Qualcomm – San Diego, CA
    Est. Salary $100k-$130k
    15 days ago 15d
    with software teams, algorithm developers, component engineers, ASIC designers and 3rd party vendors will be an integral part of… PCBs layouts Transmission lines, cross talk, and termination techniques Dense BGA layout techniques for custom ASICs Placement…
  • 4.0
    Acacia Communications – Hazlet, NJ
    Est. Salary $113k-$156k
    16 days ago 16d
    pounds ", "jobName": "Senior Analog IC Design Engineer", "shareURL": "https://workforcenow.adp.com/jobs… photonics-based optical transponders. He/she will architect, design, layout, measure and productize silicon-based, 30+Gb/s ICs.…
  • 3.5
    ON Semiconductor – Austin, TX
    1 days ago 1d
    hands-on experience in the design, development, and release of NVM memories normally associated with ASIC and ASSP products. * Work… Senior Memory NVM Development Engineer for ON Semi's Corporate R&D organization. The position is located at the Austin design
  • 3.2
    L-3 Communications – Salt Lake City, UT
    Est. Salary $74k-$102k
    24 days ago 24d
    CCA design experience incorporating FPGAs, current high performance processors (i.e. ARM, x86, ATOM), and networking ASICs… for FPGA designs Coordination across functional design teams including mechanical, signal integrity, PCB layout, and manufacturing…
  • Novus Resources – Chapel Hill, NC
    EASY APPLY
    Est. Salary $66k-$90k
    2 days ago 2d
    validate SERDES, ASICs & Memory subsystems Creation of technical documentation including product specifications, layout instructions… FPGA design Expertise using Cadence (including Orcad), Mentor design tool and flows Schematic Design/Capture, PCB layout check…
  • 2.8
    Microsemi – Addison, TX
    Est. Salary $82k-$114k
    17 days ago 17d
    u003cLI\u003eProvide guidance to junior analog engineers and layout (mask) designers.\u003c/LI\u003e\n\u003c/UL\u003e\n\u003c/DIV… Mixed Signal Design Engineer to join the Dallas Design Center. The Design team develops critical IP blocks used in Microsemi\u0027s…
  • 3.9
    Infineon Technologies – Warwick, RI
    1 days ago 1d
    Senior Staff Engineer, Power Stage & Multiphase Applications At a glance Do you have a passion for innovation and enjoy… Staff Applications Engineer is a key contributor to the team, as we work with Industry leaders to define, design and promote high-performance…
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