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Senior Engineer, ASIC Verification Jobs

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  • 4.4
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    Est. Salary $89k-$119k
    5 days ago 5d
    skills in Verilog Must be familiar with all stages of the ASIC design flow (including specification, architecture, and design… micro-architecture, implementation (using Verilog), and verification. Expected skills: 5+ years hands-on experience with…
  • 4.4
    NVIDIA – Durham, NC
    Est. Salary $112k-$151k
    5 days ago 5d
    now looking for a SeniorASICVerificationEngineer: NVIDIA is seeking elite ASICVerificationEngineers to verify the design… responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies…
  • 3.9
    Axelon, Inc. – San Jose, CA
    Est. Salary $98k-$134k
    NEW
    We are currently looking for a SeniorASIC/SoC VerificationEngineer (Contract Position) to join our team in San Jose, CA. He… and compute ASIC/ FPGA and system solutions. The ideal candidate must have prior experience developing Verification architecture…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $112k-$152k
    5 days ago 5d
    enable other engineers. Skills Required: Experience in high-performance ASICverification. Good understanding… understanding of ASIC design and verification methodologies and flows. Hands-on experience with HVL and HDL languages and tools…
  • 3.3
    Aricent – United States
    Est. Salary $44k-$70k
    11 days ago 11d
    Learn more about us at www.aricent.com. Senior SOC/ASIC - VerificationEngineers Job Description: Responsibilities Include… memory system verification team. Skill Set: Desired Skills & Experience: Experienced with verification methodology…
  • 4.4
    NVIDIA – Santa Clara, CA
    Est. Salary $140k-$188k
    6 days ago 6d
    now looking for a SeniorASICVerificationEngineer: NVIDIA is seeking elite ASICVerificationEngineers to verify the design… responsible for verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies…
  • 3.2
    Rambus – Sunnyvale, CA
    Est. Salary $102k-$139k
    4 days ago 4d
    Rambus Security Division (RSD) is hiring a talented SeniorASICVerificationEngineer to join our world class technology team in our… teams including ASIC design engineers and architects, other verificationengineers and system test engineers, security experts…
  • 3.5
    Rockwell Collins Company – Cedar Rapids, IA
    Est. Salary $67k-$94k
    13 days ago 13d
    Electrical Engineer - FPGA & ASICVerification - Government Systems Become part of the growing Government Systems Engineering FPGA… the testbench implementation and verification of a wide variety of high-performance digital ASICs and FPGAs applied to signal processing…
  • 3.4
    Micron Technology, Inc. – Minneapolis, MN
    Est. Salary $95k-$134k
    30+ days ago 30d+
    Req. ID: 84672 As a SeniorASICVerificationEngineer in Micron's Advanced Memory Solutions group, you lead the development… development UVM based verification infrastructure while verifying large complex transaction based ASICs. Typical tasks include; the development…
  • 4.4
    Space Exploration Technologies – Irvine, CA
    Est. Salary $103k-$142k
    24 days ago 24d
    skills. As a seniorverificationEngineer you'll help define the verification methodology for the complex ASICs and FPGAs. You… electrical engineering. 8+ years of experience verifying complex ASICs / FPGAs. 5+ years of experience in ASIC / FPGA verification using…
  • 4.4
    SpaceX – Redmond, WA
    Est. Salary $94k-$132k
    22 days ago 22d
    SENIORASIC / FPGA VERIFICATIONENGINEER RESPONSIBILITIES: We are looking to hire a SeniorVerificationEngineer with… leadership skills. As a SeniorverificationEngineer youll help define the verification methodology for the complex ASICs and FPGAs. You…
  • 3.5
    Rockwell Collins Company – Grand Rapids, MI
    Est. Salary $65k-$91k
    13 days ago 13d
    Electrical Engineer - FPGA & ASICVerification - Government Systems Become part of the growing Government Systems Engineering FPGA… the testbench implementation and verification of a wide variety of high-performance digital ASICs and FPGAs applied to signal processing…
  • 3.9
    Lorven Technologies – New York, NY
    Est. Salary $63k-$89k
    5 days ago 5d
    consulting companies worldwide,is looking for a ASIC/FPGA SeniorVerification Engineerfor long term project in NYC,NY, below is… Test Planning & Verification Basic understanding of CMOS ASIC fundamentals Knowledge of all phases of ASIC design and test methodology…
  • 3.5
    Collabera – Milwaukee, WI
    5 days ago 5d
    with standard cell ASIC and / FPGA design. Should be familiar with RTL and gate level design and verification using VHDL and/or…
  • 3.7
    Lockheed Martin – Littleton, CO
    Est. Salary $91k-$128k
    5 days ago 5d
    ASIC & FPGA development on R&D program. Seniorengineer with experience in developing, testing, and integrating digital signal… technical oversight. Basic Qualifications FPGA & ASICVerification experience. Language Proficient in VHDL/Verilog for…
  • 5.0
    Infoways – Milwaukee, WI
    Est. Salary $77k-$107k
    4 days ago 4d
    Role: ASIC/FPGA SeniorVerificationEngineer Location: Milwaukee, WI or Mayfield Heights, OH Duration: 6+ Months BGV… in ASIC and FPGA implementation and verification for the Design Services organization JOB SUMMARY: The Engineer will…
  • 3.3
    L-3 Communications – Camden, NJ
    Est. Salary $98k-$136k
    23 days ago 23d
    Manager, Engineering (ASIC/FPGA), the SeniorVerificationEngineer will be part of the key engineeringverification team and is… -end verification and delivery of FPGA/ASICs. S/he will develop verification architectures, set strategy for verification methodology…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $93k-$127k
    24 days ago 24d
    will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
  • Advanced Technology Search – San Jose, CA
    Est. Salary $92k-$143k
    NEW
    Description ASIC/IP VerificationEngineerASIC/Layout Design Engineer: Oversees definition, design, verification, and documentation… development, part of the ASIC solution for storage applications. They are looking for a SeniorVerificationEngineer, who will be a key…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $100k-$127k
    5 days ago 5d
    Experience in high-performance ASICverification. * Good understanding of ASIC design and verification methodologies and flows. *… Participate in the architecture and verification of complex, high-performance, and highly integrated ASICs used in Cisco's networking products…
  • 5.0
    Info-Ways – Milwaukee, WI
    EASY APPLY
    Est. Salary $77k-$107k
    4 days ago 4d
    Description IT Job Description Role: ASIC/FPGA SeniorVerificationEngineer Location: Milwaukee, WI or Mayfield Heights… in ASIC and FPGA implementation and verification for the Design Services organization JOB SUMMARY: The Engineer will…
  • 3.0
    Innovative Logic Inc. – San Jose, CA
    Est. Salary $93k-$126k
    22 days ago 22d
    We are looking for UVM Verificationengineer with the followings skills. You have to spend most of the time writing test benches… SystemVerilog, UVM, C, Verilog · Good understanding of new verification concepts…
  • 4.9
    Moseley Technical Services – Scottsdale, AZ
    5 days ago 5d
    complex challenges while foreseeing future needs. SeniorASIC FPGA Engineer (US Citizenship Required*) Scottsdale, Arizona… 4146 Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and…
  • 3.1
    Toshiba – San Jose, CA
    Est. Salary $69k-$95k
    30+ days ago 30d+
    will own the whole or parts of sub modules verification and/or full chip verification in SSD controllers. Such modules are SATA… controllers. Define and develop verification architecture and methodology Writing verification plans, tests, and building random…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $93k-$118k
    20 days ago 20d
    closure. * MS in EE with 3 years of work experience in SOC/ASIC/IP development. * Must have knowledge and experience of HDL… Knowledge of UVM and System Verilog is required. * Background in ASIC implementation including lint, CDC, synthesis, formal and static…
  • 3.5
    Rockwell Collins Company – Cedar Rapids, IA
    Est. Salary $67k-$94k
    13 days ago 13d
    of the growing Government Systems Engineering FPGA & ASIC Design Solutions team. As an engineer in this organization, you will be… design, implementation, verification and integration of a wide variety of high-performance digital ASICs and FPGAs applied to signal…
  • 3.7
    Intel – San Jose, CA
    Est. Salary $93k-$117k
    NEW
    Job Description As a Senior Design VerificationEngineer for high speed digital design you will work closely with an energetic… following: o BSEE or MSEE with 10+ years of verification experience in FPGA, ASIC or custom IC designs o Experience with high-…
  • 3.8
    Encore Semi – San Jose, CA
    EASY APPLY
    Est. Salary $105k-$143k
    6 days ago 6d
    implementation and verification of communication ASICs. Hands on experience with Verilog is a must. Expertise in verification, PD and… Successful ASIC Digital Design Engineer will be responsible for participating in, the design of leading edge ASICs for multi-function…
  • Cohere Technologies, Inc – Santa Clara, CA
    Est. Salary $92k-$119k
    NEW
    detailed design and verification. This position reports directly to the Director of FPGA/ASICEngineering Required Qualifications… the team? We have an open position for a Senior FPGA/ASIC Design Engineer in our Santa Clara office. In this position, you…
  • Dr Access Group – Scottsdale, AZ
    EASY APPLY
    11 days ago 11d
    Responsibilities: Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and… projects Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and…
  • 4.4
    SpaceX – Irvine, CA
    Est. Salary $107k-$140k
    9 days ago 9d
    human life on Mars. SENIORASIC DESIGN ENGINEER RESPONSIBILITIES: As a Senior Design Engineer youll help design, implement… that use FPGAs and/or ASICs. Participate in the micro architecture and design partition within the ASIC/FPGA. Implement design…
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