Senior ASIC Design Engineer Jobs in Sunnyvale, CA | Glassdoor
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Senior ASIC Design Engineer Jobs in Sunnyvale, CA

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  • 4.4
    VeriSilicon Holdings Co., Ltd. – San Jose, CA
    EASY APPLY
    Est. Salary $89k-$119k
    9 days ago 9d
    -end complex RTL design Programming skills in Verilog Must be familiar with all stages of the ASICdesign flow (including specification… of computer graphics and low-power design techniques a plus Experience of GPU shader design a plus…
  • 3.6
    Xilinx – San Jose, CA
    Est. Salary $93k-$126k
    NEW
    years progressive experience as DesignEngineer, Senior Verification Engineer, Product DesignEngineer or related occupation.… Oversee definition, design, verification, and documentation for Xilinx ASIC development. Verify block level designs and System-on-Chip…
  • 3.9
    Axelon, Inc. – San Jose, CA
    Est. Salary $98k-$134k
    8 days ago 8d
    We are currently looking for a SeniorASIC/SoC Verification Engineer (Contract Position) to join our team in San Jose, CA. He… Verification architecture and design of leading edge networking, storage, embedded computing ASIC and/ or FPGA. Responsibilities…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $127k-$167k
    NEW
    Digital Processor ASIC/FPGA Designer: The Senior Staff ASIC/FPGA DesignEngineer will be working in the RF Center of Excellence… the effort to meet the customer requirements. The Senior Staff FPGA/ASICdesigner will provide technical support across the enterprise…
  • 3.9
    Apple – Santa Clara, CA
    Est. Salary $122k-$165k
    17 days ago 17d
    analysis team. Develop/debug RTL design of different sections of the cache. Work with physical design team to close timing of the…
  • Cohere Technologies, Inc – Santa Clara, CA
    Est. Salary $92k-$119k
    5 days ago 5d
    open position for a Senior FPGA/ASICDesignEngineer in our Santa Clara office. In this position, you will design, implement and test… perform the detailed design and verification. This position reports directly to the Director of FPGA/ASICEngineering Required Qualifications…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $83k-$111k
    28 days ago 28d
    Digital Processor ASIC/FPGA Designer: The SeniorASIC/FPGA DesignEngineer will be working in the RF Center of Excellence (… (RF CoE). The Senior FPGA/ASICdesigner will provide technical support to the RF COE ASIC/FPGA design Team. The individual…
  • 4.0
    Cadence Design Systems – San Jose, CA
    Est. Salary $144k-$184k
    NEW
    application engineers on solving customer reported issues. Help with bringup, integration, and validation of ASIC and ASIC/FPGA-based… Key responsibilities Develop FPGA designs and subsystems (in some cases involving ASICs), from concept to productization including…
  • 3.8
    Encore Semi – San Jose, CA
    EASY APPLY
    Est. Salary $105k-$143k
    NEW
    Successful ASIC Digital DesignEngineer will be responsible for participating in, the design of leading edge ASICs for multi-function… ASIC Digital DesignEngineer Work Location: San Jose, CA Status: Permanent - Full-time Compensation: Salary + Bonus +…
  • 3.1
    Huawei Technologies – Santa Clara, CA
    21 days ago 21d
    innovation to deliver a better future...faster. Senior Staff Engineer - ASICDesign Location: Santa Clara, CA (R&D) Req #:… electrical engineering or equivalent. At least 10 years of industrial experience in ASICdesign Solid ASICdesign experience…
  • 2.8
    cPacket Networks – San Jose, CA
    Est. Salary $80k-$108k
    9 days ago 9d
    expected to be able to design, implement and test both unit level modules and higher level architecture designs. Candidates should… should be comfortable understanding tradeoffs in the design and be able to articulate them. This role requires being able to develop…
  • 3.2
    Rambus – Sunnyvale, CA
    Est. Salary $102k-$139k
    8 days ago 8d
    teams including ASICdesignengineers and architects, other verification engineers and system test engineers, security experts… Rambus Security Division (RSD) is hiring a talented SeniorASIC Verification Engineer to join our world class technology team in our…
  • 3.9
    Cisco Systems – San Jose, CA
    Est. Salary $112k-$152k
    9 days ago 9d
    Experience in high-performance ASIC verification. Good understanding of ASICdesign and verification methodologies and flows… collaboration with design, software and hardware teams to ensure a successful product delivery. Mentor and enable other engineers.…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $112k-$153k
    9 days ago 9d
    ASIC & FPGA development on R&D program. Seniorengineer with experience in developing, testing, and integrating digital signal… Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business…
  • 4.4
    NVIDIA – Santa Clara, CA
    Est. Salary $140k-$188k
    6 days ago 6d
    for a SeniorASIC Verification Engineer: NVIDIA is seeking an elite ASIC Verification Engineer to verify the design and implementation… working on verifying ASICdesign using advanced verification methodologies. You are expected to understand the design and verify correctness…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $101k-$127k
    15 days ago 15d
    timing simulation and verification, preparing design review. Work with testing engineer to evaluate, validate and debug silicon device… Responsible for design, development, modification and evaluation of high-speed digital circuit for signal processing components…
  • 3.2
    Avago Technologies – Santa Clara, CA
    Est. Salary $103k-$135k
    23 days ago 23d
    work with designengineers to verify fixes. ○ Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. ○… Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: ○ Architect block…
  • Approgence – San Jose, CA
    Est. Salary $79k-$107k
    14 days ago 14d
    Job Title : SeniorASIC/ RTL DesignEngineer with DSP Job Location : San Diego & San Jose, CA Job Description : This… perform bit-exact simulation. Modem ASICDesign team is working with physical designengineer to deliver netlist, spec timing constraints…
  • 2.7
    SK Hynix Memory Solutions – San Jose, CA
    Est. Salary $92k-$118k
    24 days ago 24d
    Descriptions: The ASICDesignEngineer will be working on the leading edge SSD controller IP design from architecture to production… support physical design and system level analysis. Qualifications: BS, MS, or PhD in Electrical Engineering with 5-10 years…
  • 3.6
    Broadcom – Santa Clara, CA
    Est. Salary $102k-$137k
    23 days ago 23d
    work with designengineers to verify fixes. ○ Write diagnostics for validation of FPGA prototype (pre-tapeout) and ASIC. ○… Charging Chips and other new initiatives. As a verification engineer, your responsibilities will include: ○ Architect block…
  • 3.8
    Marvell Technology – Santa Clara, CA
    Est. Salary $93k-$118k
    24 days ago 24d
    closure. * MS in EE with 3 years of work experience in SOC/ASIC/IP development. * Must have knowledge and experience of HDL… Knowledge of UVM and System Verilog is required. * Background in ASIC implementation including lint, CDC, synthesis, formal and static…
  • 3.7
    Lockheed Martin – Sunnyvale, CA
    Est. Salary $84k-$113k
    28 days ago 28d
    Digital Processor ASIC/FPGA Designer: The Staff ASIC/FPGA DesignEngineer will be working in the RF Center of Excellence (RF… following tasks. Participate as a senior member of a small technical team of ASIC/FPGA designers to achiev project goals. Assist…
  • 3.4
    AMD – Sunnyvale, CA
    Est. Salary $142k-$213k
    30+ days ago 30d+
    this role, he/she would manage of team of experienced ASICDesignEngineers in the verification of the IP to meet the aggressive… schedules required by AMD programs. The Sr. Manager of DesignEngineering will lead a team working on the most advanced technology…
  • 2.9
    Toshiba America Electronic Components – San Jose, CA
    EASY APPLY
    Est. Salary $93k-$127k
    28 days ago 28d
    , and building random/directed test benches. Working with design team and firmware team. Provides technical guidance to other…
  • 4.0
    Inphi Corporation – Santa Clara, CA
    Est. Salary $138k-$177k
    17 days ago 17d
    exciting career opportunity. The Candidate Title: Senior Software Designer Location: Kanata, Ontario Description: As… following areas: Low level software development in C Multi-ASIC system software validation High level GUI development in Qt…
  • 4.4
    NVIDIA – Santa Clara, CA
    Est. Salary $140k-$188k
    10 days ago 10d
    looking for a SeniorASIC Verification Engineer: NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation… be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading…
  • 3.4
    Tektronix – Santa Clara, CA
    Est. Salary $102k-$135k
    12 days ago 12d
    Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • 3.7
    Fortive – Santa Clara, CA
    Est. Salary $95k-$126k
    11 days ago 11d
    Responsibilities The ASIC Mixed Signal engineer will be a member of the ASIC team that interacts with Analog/circuit designers, digital/RTL… /industry experience in circuit and ASIC o Exposure to analog and mixed-signal IC design o Familiarity with standard interfaces…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $81k-$109k
    NEW
    experience in CMOS Design, ASICDesign, VLSI and Device Physics Experience interfaceing with engineers, senior managers and stakeholders… Electrical Engineering or Computer Engineering Computer Science with at least 10 years of experience in IC/ASICDesign or Computer…
  • 3.7
    Intel – Santa Clara, CA
    Est. Salary $87k-$121k
    19 days ago 19d
    NGS) 5G BBIC team, we are looking for a senior level Front End Design Automation Engineer to join the 5G Mobile Wireless Technology… Frontend Design Automation Engineer, you will be responsible for driving methodology, and productivity improvements in design flows…
  • 3.5
    QuickLogic – Sunnyvale, CA
    Est. Salary $110k-$144k
    6 days ago 6d
    digital simulator such as VERILOG Highly Desirable: ASICdesign experience Product development experience CAD experience… Posted On06/22/2017 Senior Staff, DesignEngineer Sunnyvale Salary Range : Worker Category…
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