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Senior ASIC Layout Design Engineer Jobs in Vancouver, BC

1 Job

  • 2.7
    Microsemi – Burnaby
    8 days ago 8d
    phases of ASICdesign (RTL, verification, synthesis, layout, etc) Verilog and System Verilog are the preferred design and verification… radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices…
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