Synopsys

Synopsys Interviews

1. Jul 17, 2022

   FPGA Engineer Interview

   Anonymous Employee in Sunnyvale, CA

   No Offer

   Negative Experience

   Average Interview

   Application

   I applied through a recruiter. The process took 1+ week. I interviewed at Synopsys (Sunnyvale, CA)

   Interview

   There were total 5 rounds of interview. Started with hiring manager, very nice person, he introduced himself first and then explained the detail of the role and what can candidate expect in day to day activities.
   
   2nd round interview with the junior level of engineer, it went really well, most of the questions were entry level questions. She planned well and touched almost all the technical areas.
   
   3rd round interview with director, sweet person, no technical questions but went more like a casual talk which is what candidate expected from the director level of person. He also explained the role in detailed way and what they expect from me as well.
   
   4th round with senior architect, he claimed that he knew everything about FPGA, so he asked me to talk about breadth and depth of FPGA, few specific questions about architecture and timing constraints. Overall positive in 4th round.
   
   5th round with senior manger who leads verification team in Bangalore, India. First of all, he came 30 mins late for the interview, he didn’t introduce himself, he didn’t turn on camera in video interview but my camera was on. He asked me to design a circuit that detects a 1ns asynchronous pulse, I designed using transparent latch in FPGA, but he said there is no transparent latch exist in FPGA, I really don’t how to respond for that. Next he struggled to frame the questions related to timing constraints, but I was able to figure out what he was trying to ask, after I gave a answer, he said I should have told that answer in the beginning in rude manner. At last he asked whether I have any questions to ask him, I said yes and asked him what is your role and responsibility, I already knew that he is senior a manager but my intention was to know how person leads verification team in Bangalore, India works with FPGA teams that design emulation product in Sunnyvale, CA. In reply he said that I don’t have to know about it and disconnected the call indecent manner.
   
   What l learnt from this 5th round is how toxic the work culture in India Office. The people who interviewed me from the Sunnyvale office were really good and very professional but the person from Bangalore was really horrible, he literally abused me in the interview, it almost took week time to realize what just happened in the 5th round. I never ever thought that I will experience such unprofessional treatment from company like a Synopsys!
   
   Advice to the hiring team, Synopsys must train the hiring team and teach how to treat the candidate.
   

   Interview

   How to solve setup and hold time violation, Name few techniques. Write RTL code for shift register. How to handle clock domain crossing and name few techniques. How to do floor planning. Write a RTL code latch. Design a circuit to detect 1ns asynchronous signal. What is name space in python. How to constrain asynchronous signal. When to use set max delay.

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