Cash Bonus, Stock Bonus, Profit Sharing, Commission Sharing, Tips have not been reported for this role.
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How much does a ASIC Design Verification Engineer at SmartPlay make in San Jose, CA? The typical salary for a SmartPlay San Jose ASIC Design Verification Engineer ranges from $82,719-$110,397, with an average salary of $90,439. Salary estimates based on 70 salary report(s) submitted anonymously to Glassdoor by SmartPlay ASIC Design Verification Engineer employees in San Jose, CA or estimated based upon statistical methods.
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