Interview starts with a common & basic question which is to tell me about yourself. Next goes through your resume & asks about you most recent work, what's your role, what's your verification plan or approach Asks you how comfortable you are with systemverilog(SV), universal verification methodology(UVM)

I applied for the job by sending my resume. I shortlisted for the interview. Interview was two rounds 1st round -> Digital and Verilog Intermediate questions 2nd round -> Basic of Core subjects and Aptitude