A lot of verilog questions and logic design questions

I got a phone interview for verification Intern with digital video tech team . Hiring manager asked me about my resume. Academic Projects . He started with some basic verilog stuff . Setup , hold . Divede by 2 , 3 ckt. then he jumped to system verilog Asserrtions , Interferance , mail box. Scoreboard. Code coverage , function coverage. He took nice rreview of all my ASIC acadamic project . He grilled over the testbench . He gave a code of some 20 lines . and asked some line coverage questions. I had my video encoder project on my resume . So he grilled over like 20 mins on motion estimation and its algorithm. After 2 weeks I got the offer .