Qrypt FPGA/ASIC Verification Engineer interview questions

Interview process was smooth and pleasant. Started with an over the phone conversation first, followed by an in office interview, and then followed by a virtual HR interview. They asked questions about my knowledge of UVM and Verilog, surprisingly not too much about timing. Later on I received an email that they wanted someone with 12-15 years experience so unfortunately I was no longer considered for the role.