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      Intel Corporation

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      Physical Design Engineer Interview

      Jun 4, 2026
      Anonymous Interview Candidate
      Bengaluru
      No offer
      Positive experience
      Difficult interview

      Application

      I applied online. I interviewed at Intel Corporation (Bengaluru) in May 2026

      Interview

      Deep whiteboard interview , was asked to draw graphs for non ideal characteristics for cmos design and pvt corners. Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.

      Interview questions [1]

      Question 1

      was asked to draw graphs for non ideal characteristics for cmos design and pvt corners.Questions related to project and physical design concepts. Focused on semiconductor physics and technical depth in each answer.
      Answer question

      Other Physical Design Engineer Interview Reviews for Intel Corporation

      Physical Design Engineer Interview

      May 30, 2026
      Anonymous Interview Candidate
      Petah Tikva
      No offer
      Positive experience
      Average interview

      Application

      I interviewed at Intel Corporation (Petah Tikva)

      Interview

      very nice people. given 2 question one on system of the group and one for coding in binary search and recursion. we started by little talking and then a little bit on one of the project and then 2 questions

      Interview questions [1]

      Question 1

      1. given graph and car with light sensor and we want to find the right spot of the dot on the graph. it was binary search classical
      Answer question

      Physical Design Engineer Interview

      Jul 3, 2025
      Anonymous employee
      Austin, TX
      Accepted offer
      Positive experience
      Average interview

      Application

      I interviewed at Intel Corporation (Austin, TX)

      Interview

      This was the second round lasted about an hour or so. The first round was mostly about my work as I had 3 year experience and I had to walk them through the projects I did etc..,.

      Interview questions [1]

      Question 1

      If the combination logic between 2 FF's is cut like an interface, how do you set_input_delay and set_output_delay for left and right partitions. The clock is the same for both.
      Answer question