Phone interview lasted for 1 hour. Questions were as follows: derive equation from FSM, K-maps, equation reduction using De-morgans law,pipelining and hazards, inverter working, how Vth varied with temp, SRAM working. 2 weeks later was called for onsite interview. Consisted of 4 rounds. 1st round: questions related to system verilog, projects, design FSM from waveforms and conditions given. C code for converting binary to octal. 2nd round: Given a black box and some conditions and asked to design a digital system. Design FF's. Given verilog code and asked to design gate level diagram. 3rd round: Questions related to computer architecture. Asked project related questions.Cache write policies, write back, write through, PCI,PCI-E, arbitration, how to get faster circuits, latest INTEL chipset architecture. Remember all the questions were indirect.Logical questions. 4th round: Timing analysis. Slew, fanout, design flow, setup and hold circuit analysis. Circuit analysis. All questions were logical,none direct. Hope this helps!! All the interviewer's were friendly and co-operative. It was basically like a discussion rather than question and answer session.

Questions on physical design concepts , syn and apr Sta questions about constraints Concepts of transistor physics Phone screen, multiple round, followed by conversation with the hiring manager Overall good experience