Two phone interviews followed by on-site interview. The first phone interview is about PLL design an d the second has more general circuit questions. On the on-site interview, there were mostly general analog circuit questions and no PLL/SerDes questions. The interview is not very difficult. I wait three weeks for the decision. The people in the group are nice and the working environment is good.

I was interviewed by phone twice. In the first interview, I was interviewed by an experienced mixed-signal designer. His questions follows a certain flow, like device physics about depletion region, common source amplifiers, current mirror, noise analysis, gain-boosting amplifiers, 2.5bit-per stage in pipelined ADC, sigma-delta modulator, and noise profile of free running VCO and PLL transfer functions. Some of the topics were chosen from my resume. The second interview was held by a senior design engineer. She sent me a pdf to solve circuit problems, mainly focused on large signal analysis, output impedance analysis, feedback analysis and miller compensation. I did not do well in this part so I got kicked off.