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      Synopsys

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      Engineering Interview

      May 11, 2011
      Anonymous Interview Candidate
      No offer
      Positive experience
      Difficult interview

      Application

      I applied through an employee referral. The process took 1+ week. I interviewed at Synopsys in Jun 2009

      Interview

      Sometime back i interviewed for a position at a big MNC. I would like to share my interview with you so that you can know the questions that interviewer ask these days. Position i was looking for was a Backend Design Engineer (logic syn, PV etc). Here are some question which i remember. 1.) Optimize 2 input inverting mux (D1 connected to A, D2 tied low and Select tied to B) 2.) Solve the following using Boolean logic. a. O = A + B[(AB+B) + AB’] 3.) Draw circuit for the following logic. If tag{3:0} == adr(3:0) Then ( Match = 1 ) Else ( Match = 0 ) End 4.) What is setup and hold and what factors determine setup and holdtime calculation for a flop. 5.) What is PV and how does it impact the timing of a chip 6.) What happens to power if voltage drops. Tell me the equation of static and dyn power. 7.) What is noise and RV and how to fix it 8.) What is spacing and shielding and when to prefer either of two. 9.) What determines the metal pitches for a particular process technology. there were more however do not remember now. will post more once it comes to mind. The part after STA, FV, CTS would be ASIC Place/ Route. Few companies would hire specifically for ASIC Place/ Route work. So, Students should concentrate more on Front-end design part of ASIC Design. [HDL, testbenches and after some experience students get an opportunity to do logic synthesis, STA, FV and other front-end tasks. I think, more new-college-grads are chosen for Front-end design part of ASIC Design than Back-end. Once again, dont worry too much about all steps in detail [as a new college grad] Remember concepts are important; rattling off specific tool commands may NOT show your understanding of the tool. For example, 1] What are various compile strategies? Which strategy should be used when? think of all the variables involved, top-down, bottom-up, small- design, large-design, constraints already defined, tight constraints, loose constraints, is it a new design OR migration from earlier design? I can understand you may NOT be able to think of all the variables BUT the key here is to "let the interviewer know HOW YOU THINK" Remember that the interview questions are generic concentrating on fundamentals. always ask the questions like why and how that phenomenon happens. If the phenomenon is happening some particular way, [may be the way you do NOT want it to happen, then see how to improve that thing ; So, first you will have to think why it is happening that way and is there a better way to do it] Targeting above sentence to VLSI point of view; THINK OF all VLSI Qns with that approach; area/ speed tradeoff, WHY does textbook say that critical input should be connected closer to output, 2bit-line SRAM versus 1 bit-line SRAM tradeoff. If you can explain it clearly to yourself, any interview will be piece of cake.
      14

      Other Engineering Interview Reviews for Synopsys

      Engineering Interview

      Jun 21, 2012
      Anonymous Interview Candidate
      Hillsboro, OR
      Declined offer
      Positive experience
      Average interview

      Application

      I applied through an employee referral. The process took 1 day. I interviewed at Synopsys (Hillsboro, OR) in May 2012

      Interview

      The phone screen was light weight, just background check and so on. The onsite interview was a little bit more serious. The first talk was with 2 heads (one is the boss of the group and one is his boss). Both were pretty friendly without deep technical questions. Then there were 4 2-1 or 3-1 interviews, each 1 hour. Most were technical and some are tough. Covering algorithms / C++ knowledges / behavioral questions. I answered 80% of them.

      Interview questions [1]

      Question 1

      What happened when a function is called in C++?
      Answer question
      1

      Engineering Interview

      Jan 28, 2011
      Anonymous Interview Candidate
      No offer
      Negative experience
      Average interview

      Application

      I applied through an employee referral. The process took 1 day. I interviewed at Synopsys in Jan 2011

      Interview

      Got email, asking to setup a phone interview. Took about 1 hour. Was asked to describe my Ph.D.

      Interview questions [1]

      Question 1

      What "static" refers in C to?
      Answer question

      Engineering Interview

      Nov 17, 2010
      Anonymous Interview Candidate
      Declined offer
      Positive experience
      Average interview

      Application

      The process took 1 day. I interviewed at Synopsys in Oct 2010

      Interview

      screening phone interview by a senior manager first followed by 4-5 rounds of technical discussins

      Interview questions [1]

      Question 1

      given a recursive call u have to trace it functioning
      Answer question