Analog design engineer Interview Questions
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Analog Design Engineer interview questions shared by candidates
How to make sure the 2-stage opamp is stable? How does the compensation work?
5 Answers↳
Using Miller compensation. A compensation capacitor across the 2nd stage to create pole splitting. A series resistor to the cap might be needed to solve the rhp zero problem Less
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Using compensation capacitor, which makes the low frequency pole's frequency become lower and high frequency pole's frequency higher, so OPmap is more stable. Less
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Using compensation network including capacitor and resistor and monitoring the phase margin and gain margin as well. Less
You have to design an LDO with an output voltage of 2V and a supply of 3.6. What is the problem and how do you solve it?
3 Answers↳
The question was not about efficiency, since the answer was about voltage rating of devices. It was for experienced designer. Less
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Were this questions for a graduate vacancy? or experienced Analog designer (2-3 years) Less
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From the formulation of the question it was clear that there was a voltage stress on the device, but I needed informations on the technology to answer that (maximum voltage rating, ..). I didn't obtain any detail. I could not think of any solution to the problem (I was assuming CMOS technology), when he told me: you use a DMOS as a pass-device. Well, he did not even say that the technology was BCD.. Less
why is matching required?
2 Answers↳
Maximum power transfer.
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Matching in MOSFET transistor inverters is necessary because the electrons that move in the NMOS transistor move at a faster rate than the holes that move in the PMOS transistor. This means when a signal is received, the NMOS will react before the PMOS. To equalize this, they transistors must be matched (by adjusting their widths) so that their transition times are the same. Less
What are the advantages of cascode current mirror? What is the equation of Ro? Noise, Miller effect, frequency compensation... What is the difference between Flip-flop and Latch?
What input capacitance do I see when driving a common source amplifier?
2 Answers↳
Cin = Cgs + Cgd (1 + gm/gds) (Miller effect on cgd)
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For CS amplifier, CIN= CGS+CGD.
